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Message-ID: <CAK44p20gtJ=ywOvZVu8eZKFBVCNgJSndhffhOJOuRuuGNHXiTA@mail.gmail.com>
Date:	Thu, 8 Nov 2012 16:03:12 +0530
From:	Amit Kachhap <amit.kachhap@...aro.org>
To:	Jonghwan Choi <jhbird.choi@...sung.com>
Cc:	open list <linux-kernel@...r.kernel.org>,
	Zhang Rui <rui.zhang@...el.com>,
	Sachin Kamat <sachin.kamat@...aro.org>
Subject: Re: [PATCH v2 2/2] therma: exynos: Supports thermal tripping

On 31 October 2012 12:17, Jonghwan Choi <jhbird.choi@...sung.com> wrote:
> TMU urgently sends active-high signal (thermal trip) to PMU,
> and thermal tripping by hardware logic i.e PMU is performed.
> Thermal tripping means that PMU cut off the whole power of SoC
> by controlling external voltage regulator.
>
> Signed-off-by: Jonghwan Choi <jhbird.choi@...sung.com>
> ---
>  drivers/thermal/exynos_thermal.c |    4 ++++
>  1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/thermal/exynos_thermal.c
> b/drivers/thermal/exynos_thermal.c
> index 6ce6667..5672e95 100644
> --- a/drivers/thermal/exynos_thermal.c
> +++ b/drivers/thermal/exynos_thermal.c
> @@ -53,6 +53,7 @@
>  #define EXYNOS_TMU_TRIM_TEMP_MASK      0xff
>  #define EXYNOS_TMU_GAIN_SHIFT          8
>  #define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
> +#define EXYNOS_TMU_TRIP_EN             BIT(12)
>  #define EXYNOS_TMU_CORE_ON             1
>  #define EXYNOS_TMU_CORE_OFF            0
>  #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET     50
> @@ -656,6 +657,9 @@ static void exynos_tmu_control(struct platform_device
> *pdev, bool on)
>         if (data->soc == SOC_ARCH_EXYNOS) {
>                 con |= pdata->noise_cancel_mode <<
> EXYNOS_TMU_TRIP_MODE_SHIFT;
>                 con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
> +
> +               if (pdata->trigger_level3_en)
> +                       con |= EXYNOS_TMU_TRIP_EN;
Hi Jonghwan Choi,

IMO, Also you need to write 4th trigger level, Currently only 3
trigger levels are stored in register THD_TEMP_RISE.

Thanks,
Amit Daniel
>         }
>
>         if (on) {
> --
> 1.7.4.1
>
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