linux-kernel - Re: [PATCH] PCI: Fix bit definitions of PCI_EXP

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Message-ID: <CADnq5_NWNjsowbPRxiL0cA6XJ_5uZYKO-OfYMZu_NxYeg7s0yA@mail.gmail.com>
Date:	Fri, 9 Nov 2012 12:37:38 -0500
From:	Alex Deucher <alexdeucher@...il.com>
To:	Bjorn Helgaas <bhelgaas@...gle.com>
Cc:	Jingoo Han <jg1.han@...sung.com>, linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org
Subject: Re: [PATCH] PCI: Fix bit definitions of PCI_EXP_LNKCAP2 register

On Fri, Nov 9, 2012 at 12:15 PM, Bjorn Helgaas <bhelgaas@...gle.com> wrote:
> On Thu, Nov 8, 2012 at 11:56 PM, Jingoo Han <jg1.han@...sung.com> wrote:
>> According to the PCIe 3.0 spec, PCI_EXP_LNKCAP2_SLS_2_5GB is
>> 1st bit of PCI_EXP_LNKCAP2 register, not 0th bit. So, the bit
>> definition of supported link speed vector should be fixed.
>>
>> Signed-off-by: Jingoo Han <jg1.han@...sung.com>
>> ---
>>  include/uapi/linux/pci_regs.h |    6 +++---
>>  1 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
>> index 20ae747..14a3184 100644
>> --- a/include/uapi/linux/pci_regs.h
>> +++ b/include/uapi/linux/pci_regs.h
>> @@ -544,9 +544,9 @@
>>  #define  PCI_EXP_OBFF_WAKE_EN  0x6000  /* OBFF using WAKE# signaling */
>>  #define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44      /* v2 endpoints end here */
>>  #define PCI_EXP_LNKCAP2                44      /* Link Capability 2 */
>> -#define  PCI_EXP_LNKCAP2_SLS_2_5GB 0x01        /* Current Link Speed 2.5GT/s */
>> -#define  PCI_EXP_LNKCAP2_SLS_5_0GB 0x02        /* Current Link Speed 5.0GT/s */
>> -#define  PCI_EXP_LNKCAP2_SLS_8_0GB 0x04        /* Current Link Speed 8.0GT/s */
>> +#define  PCI_EXP_LNKCAP2_SLS_2_5GB 0x02        /* Current Link Speed 2.5GT/s */
>> +#define  PCI_EXP_LNKCAP2_SLS_5_0GB 0x04        /* Current Link Speed 5.0GT/s */
>> +#define  PCI_EXP_LNKCAP2_SLS_8_0GB 0x08        /* Current Link Speed 8.0GT/s */
>>  #define  PCI_EXP_LNKCAP2_CROSSLINK 0x100 /* Crosslink supported */
>>  #define PCI_EXP_LNKCTL2                48      /* Link Control 2 */
>>  #define PCI_EXP_LNKSTA2                50      /* Link Status 2 */
>
> I think this patch is correct, per spec sec 7.8.18.  If I apply it, I
> think the comments should also be changed to "Supported Link Speed"
> instead of "Current."

Correct.

>
> The only in-tree user of these symbols is
> drm_pcie_get_speed_cap_mask().  Dave, can you ack/nack this?  I don't
> want to apply this if it's going to break something there.

The patch is fine and shouldn't break anything.

Alex
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