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Date: Sun, 11 Nov 2012 19:17:07 +0100
From: Stephane Eranian <eranian@...gle.com>
To: Robert Richter <rric@...nel.org>
Cc: Jacob Shin <jacob.shin@....com>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Paul Mackerras <paulus@...ba.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>, x86 <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/4] perf, amd: Enable AMD family 15h northbridge counters
On Sat, Nov 10, 2012 at 12:50 PM, Robert Richter <rric@...nel.org> wrote:
> On 09.11.12 19:01:34, Jacob Shin wrote:
>> The following patchset enables 4 additional performance counters in
>> AMD family 15h processors that counts northbridge events -- such as
>> DRAM accesses.
>>
>> This patchset is based on previous work done by Robert Richter
>> <rric@...nel.org> :
>>
>> https://lkml.org/lkml/2012/6/19/324
>
> The original patch set of this is here (a rebased version):
>
> http://git.kernel.org/?p=linux/kernel/git/rric/oprofile.git;a=shortlog;h=refs/heads/perf-nb
>
> This code was tested in detail.
>
>> The main differences are:
>>
>> - The northbridge counters are indexed contiguously right above the
>> core performance counters.
>>
>> - MSR address offset calculations are moved to architecture specific
>> files.
>>
>> - Interrups are set up to be delivered only to a single core.
>
> So I rather suggest to make delta patches on top of my patches.
>
> Peter's main concerns were that my patch set is not in the
> Intel-uncore style. I started reworking this but was not able to
> finish my work. This concerns still exist.
>
That was my concern too. I don't recall exactly why it could not
be totally disconnected from the core PMU. I think hardware-wise,
it was possible. Could you refresh my memory?
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