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Message-ID: <20121112145505.GC24433@rric.localhost>
Date: Mon, 12 Nov 2012 15:55:05 +0100
From: Robert Richter <rric@...nel.org>
To: Jacob Shin <jacob.shin@....com>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Paul Mackerras <paulus@...ba.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
Thomas Gleixner <tglx@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>,
Stephane Eranian <eranian@...gle.com>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] perf, amd: Enable AMD family 15h northbridge counters
Jacob,
On 11.11.12 12:44:26, Jacob Shin wrote:
> Because
> in an upcoming processor family, there is no core performance counter
> extensions, but we do have northbridge performance counters. Meaning
> the counter address base would be c0010000 and northbridge counters
> live in c0010240, being 0x240 apart, we could make counter masks work
> but that testng awful alot of 0's for every address offset calculation
> .
I agree with you that my imlementation of counter masks does not fit
perfectly for this reason and also since it requires too much changes
in generic code (for_each_generic_counter()) which Peter did not like
either. So it is ok to me to replace your solution with the patch that
implenents counter bitmasks.
-Robert
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