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Message-ID: <CABPqkBSEzAD00mFdxSMy-vPvMfuO=9-OBxMhwooF9-kebwu_YQ@mail.gmail.com>
Date:	Mon, 12 Nov 2012 22:08:54 +0100
From:	Stephane Eranian <eranian@...gle.com>
To:	Jacob Shin <jacob.shin@....com>
Cc:	Robert Richter <rric@...nel.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	Thomas Gleixner <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>, x86 <x86@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: Re: [PATCH 0/4] perf, amd: Enable AMD family 15h northbridge counters

On Mon, Nov 12, 2012 at 5:13 PM, Jacob Shin <jacob.shin@....com> wrote:
> On Mon, Nov 12, 2012 at 03:22:33PM +0100, Robert Richter wrote:
>> Stephane,
>>
>> On 12.11.12 13:24:38, Stephane Eranian wrote:
>> > Anybody from AMD or formerly @ AMD care to submit a libpfm4 patch
>> > to add the Fam15th NB events?
>> >
>> > I'd like to avoid having to type them in manually.
>>
>> Suravee may probably help you here.
>
> Suravee is out of the office until the end of the month,
>
> Is this necessary ASAP for this perf patchset to go upstream? If so,
> I'll commit to getting a patch out for libpfm4 soon.
>
> Otherwise, I'll ask Suravee to work on it when he gets back.
>
Not critical for the kernel part. USeful for user level tools beyond
perf.

> Thanks,
>
> -Jacob
>
>>
>> HTH
>>
>> -Robert
>>
>
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