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Message-ID: <50A5E805.7060509@nvidia.com>
Date: Fri, 16 Nov 2012 15:15:17 +0800
From: Mark Zhang <markz@...dia.com>
To: Thierry Reding <thierry.reding@...onic-design.de>
CC: "airlied@...hat.com" <airlied@...hat.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>
Subject: Re: [PATCH] drm: Add NVIDIA Tegra30 support
On 11/16/2012 03:11 PM, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Fri, Nov 16, 2012 at 02:48:55PM +0800, Mark Zhang wrote:
>> On 11/16/2012 02:43 PM, Thierry Reding wrote:
>>>> Old Signed by an unknown key
>>>
>>> On Fri, Nov 16, 2012 at 12:58:09PM +0800, Mark Zhang wrote:
>>>> This patch is based on Thierry's drm patch for Tegra20:
>>>> - [PATCH v2 0/6] Device tree updates for host1x support
>>>> - [PATCH v3 0/2] NVIDIA Tegra DRM driver
>>>>
>>>> It adds the support for NVIDIA Tegra30.
>>>>
>>>> Signed-off-by: Mark Zhang <markz@...dia.com>
>>>
>>> Hi Mark,
>>>
>>> I already carry a similar patch in my tegra/next branch and was going to
>>> post that once I get word back that tegra-drm actually works on Tegra30.
>>>
>>
>> Sorry for that. Actually I didn't sync your tree yet.
>>
>>> You do have the hardware available, right? Did you test this patch on
>>> top of the latest (v3) tegra-drm patches and arch/arm/mach-tegra (v2)
>>> patches I sent a few hours ago?
>>>
>>
>> Yes, I have a cardhu here. Yes, I made this patch on top of your v3 & v2
>> patches and it worked on my cardhu.
>
> Okay, that's great! The reason I wanted this to be tested again
> explicitly is that I've made some minor modifications to bring the
> Tegra30 code more in line with the Tegra20 code where clock setup is
> concerned.
>
> Since everything works for you on Tegra30, I'll push the Tegra30 related
> patches into the branch that David will pull from.
>
Great. Thanks! Hope to see the display of Tegra 2 and Tegra 3 works in
kernel 3.8.
> Thierry
>
> * Unknown Key
> * 0x7F3EB3A1
>
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