linux-kernel - Re: [PATCH 2/3] x86,mm: drop TLB flush from ptep_set_access

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Message-ID: <CAGDaZ_qF03zB2XTF2nXtsPh1Zf90zVn-ZaoZSNAQg7BGyYEaww@mail.gmail.com>
Date:	Sat, 17 Nov 2012 13:53:26 -0800
From:	Shentino <shentino@...il.com>
To:	Rik van Riel <riel@...hat.com>
Cc:	Linus Torvalds <torvalds@...ux-foundation.org>,
	Borislav Petkov <bp@...en8.de>,
	Alan Cox <alan@...rguk.ukuu.org.uk>,
	Ingo Molnar <mingo@...nel.org>,
	Andi Kleen <andi@...stfloor.org>,
	Michel Lespinasse <walken@...gle.com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Andrea Arcangeli <aarcange@...hat.com>,
	Mel Gorman <mgorman@...e.de>,
	Johannes Weiner <hannes@...xchg.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	linux-mm <linux-mm@...ck.org>,
	Florian Fainelli <florian@...nwrt.org>,
	Borislav Petkov <borislav.petkov@....com>
Subject: Re: [PATCH 2/3] x86,mm: drop TLB flush from ptep_set_access_flags

On Sat, Nov 17, 2012 at 7:24 AM, Rik van Riel <riel@...hat.com> wrote:
> On 11/17/2012 09:56 AM, Linus Torvalds wrote:
>>
>> On Sat, Nov 17, 2012 at 6:50 AM, Borislav Petkov <bp@...en8.de> wrote:
>>>
>>> I don't know, however, whether it would be prudent to have some sort of
>>> a cheap assertion in the code (cheaper than INVLPG %ADDR, although on
>>> older cpus we do MOV CR3) just in case. This should be enabled only with
>>> DEBUG_VM on, of course...
>>
>>
>> I wonder how we could actually test for it. We'd have to have some
>> per-cpu page-fault address check (along with a generation count on the
>> mm or similar). I doubt we'd figure out anything that works reliably
>> and efficiently and would actually show any problems
>
> Would it be enough to simply print out a warning if we fault
> on the same address twice (or three times) in a row, and then
> flush the local TLB?
>
> I realize this would not just trigger on CPUs that fail to
> invalidate TLB entries that cause faults, but also on kernel
> paths that cause a page fault to be re-taken...

I'm actually curious if the architecture docs/software developer
manuals for IA-32 mandate any TLB invalidations on a #PF

Is there any official vendor documentation on the subject?

And perhaps equally valid, should we trust it if it exists?

> ... but then again, don't we want to find those paths and
> fix them, anyway? :)
>
> --
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