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Message-ID: <CAH9JG2VKYSAQ=Og4-fgToV_aNwEV_aH-=UQZDbAOnA-ShfKdYw@mail.gmail.com>
Date: Tue, 20 Nov 2012 10:40:28 +0900
From: Kyungmin Park <kmpark@...radead.org>
To: Jonghwan Choi <jhbird.choi@...sung.com>,
"jonghwa3.lee" <jonghwa3.lee@...sung.com>
Cc: open list <linux-kernel@...r.kernel.org>,
Amit Daniel Kachhap <amit.kachhap@...aro.org>,
Zhang Rui <rui.zhang@...el.com>,
Sachin Kamat <sachin.kamat@...aro.org>
Subject: Re: [PATCH v3 2/2] therma: exynos: Supports thermal tripping
On 11/20/12, Jonghwan Choi <jhbird.choi@...sung.com> wrote:
> TMU urgently sends active-high signal (thermal trip) to PMU,
> and thermal tripping by hardware logic i.e PMU is performed.
> Thermal tripping means that PMU cut off the whole power of SoC
> by controlling external voltage regulator.
>
> Signed-off-by: Jonghwan Choi <jhbird.choi@...sung.com>
Ackedy-by: Kyungmin Park <kyungmin.park@...sung.com>
> ---
> drivers/thermal/exynos_thermal.c | 10 ++++++++++
> 1 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/thermal/exynos_thermal.c
> b/drivers/thermal/exynos_thermal.c
> index 129e827..569478d 100644
> --- a/drivers/thermal/exynos_thermal.c
> +++ b/drivers/thermal/exynos_thermal.c
> @@ -58,6 +58,7 @@
> #define EXYNOS_TMU_CORE_ON BIT(0)
> #define EXYNOS_TMU_CORE_ON_SHIFT 0
> #define EXYNOS_TMU_CORE_ON_MASK (0x1 <<
> EXYNOS_TMU_CORE_ON_SHIFT)
> +#define EXYNOS_TMU_TRIP_EN BIT(12)
> #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
>
> /* Exynos4210 specific registers */
> @@ -631,6 +632,12 @@ static int exynos_tmu_initialize(struct
> platform_device
> *pdev)
> goto out;
> }
> rising_threshold |= (threshold_code << 16);
> + threshold_code = temp_to_code(data,
> pdata->trigger_levels[3]);
> + if (threshold_code < 0) {
> + ret = threshold_code;
> + goto out;
> + }
> + rising_threshold |= (threshold_code << 24);
>
> writel(rising_threshold,
> data->base + EXYNOS_THD_TEMP_RISE);
> @@ -665,6 +672,8 @@ static void exynos_tmu_control(struct platform_device
> *pdev, bool on)
> con &= ~(EXYNOS_TMU_TRIP_MODE_MASK | EXYNOS_MUX_ADDR_MASK);
> con |= pdata->noise_cancel_mode <<
> EXYNOS_TMU_TRIP_MODE_SHIFT;
> con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
> + if (pdata->trigger_levels[3])
> + con |= EXYNOS_TMU_TRIP_EN;
> }
>
> if (on) {
> @@ -770,6 +779,7 @@ static struct exynos_tmu_platform_data const
> exynos_default_tmu_data = {
> .trigger_levels[0] = 85,
> .trigger_levels[1] = 103,
> .trigger_levels[2] = 110,
> + .trigger_levels[3] = 120,
> .trigger_level0_en = 1,
> .trigger_level1_en = 1,
> .trigger_level2_en = 1,
> --
> 1.7.4.1
>
> --
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