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Message-ID: <50AD85C0.1010407@huawei.com>
Date: Thu, 22 Nov 2012 09:54:08 +0800
From: Yijing Wang <wangyijing@...wei.com>
To: Betty Dall <betty.dall@...com>
CC: <bhelgaas@...gle.com>, <jbarnes@...tuousgeek.org>,
<alex.williamson@...hat.com>, <ddutile@...hat.com>,
<linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>
Subject: Re: [PATCH] PCI: add PCIe 8.0 GT/s supported link speed define
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index 20ae747..0cf8abb 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -469,6 +469,7 @@
> #define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */
> #define PCI_EXP_LNKSTA_CLS_2_5GB 0x01 /* Current Link Speed 2.5GT/s */
> #define PCI_EXP_LNKSTA_CLS_5_0GB 0x02 /* Current Link Speed 5.0GT/s */
> +#define PCI_EXP_LNKSTA_CLS_8_0GB 0x04 /* Current Link Speed 8.0GT/s */
> #define PCI_EXP_LNKSTA_NLW 0x03f0 /* Nogotiated Link Width */
> #define PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */
> #define PCI_EXP_LNKSTA_LT 0x0800 /* Link Training */
>
Hi Betty,
There is another patch uses this PCI_EXP_LNKSTA_CLS_8_0GB ? I think maybe move this change to
the patch uses this symbol is better.
--
Thanks!
Yijing
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