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Date:	Tue, 27 Nov 2012 13:10:51 +0100
From:	Robert Richter <rric@...nel.org>
To:	Jacob Shin <jacob.shin@....com>
Cc:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	Thomas Gleixner <tglx@...utronix.de>,
	"H. Peter Anvin" <hpa@...or.com>,
	Stephane Eranian <eranian@...gle.com>, x86@...nel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/5] perf, amd: Enable northbridge performance counters
 on AMD family 15h

One minor comment:

On 26.11.12 16:48:30, Jacob Shin wrote:
>  __init int amd_pmu_init(void)
>  {
>  	/* Performance-monitoring supported from K7 and later: */
> @@ -666,6 +749,10 @@ __init int amd_pmu_init(void)
>  	setup_event_constraints();
>  	setup_perfctr_core();
>  
> +	num_core_counters = x86_pmu.num_counters;

I would better move this to setup_perfctr_nb().

> +
> +	setup_perfctr_nb();
> +
>  	/* Events are common for all AMDs */
>  	memcpy(hw_cache_event_ids, amd_hw_cache_event_ids,
>  	       sizeof(hw_cache_event_ids));

Otherwise the whole patch set looks good.

Acked-by: Robert Richter <rric@...nel.org>

Thanks Jacob.

-Robert
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