linux-kernel - RE: [E1000-devel] 82571EB: Detected Hardware Unit Hang

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <9B4A1B1917080E46B64F07F2989DADD62F2D8116@ORSMSX102.amr.corp.intel.com>
Date:	Tue, 27 Nov 2012 18:24:33 +0000
From:	"Fujinaka, Todd" <todd.fujinaka@...el.com>
To:	Ben Hutchings <bhutchings@...arflare.com>,
	Mary Mcgrath <mary.mcgrath@...cle.com>
CC:	Joe Jin <joe.jin@...cle.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"e1000-devel@...ts.sf.net" <e1000-devel@...ts.sf.net>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	linux-pci <linux-pci@...r.kernel.org>
Subject: RE: [E1000-devel] 82571EB: Detected Hardware Unit Hang

Thanks for the clarification. I was just going by the PCIe spec, which says the lowest value of both ends is used, and I figured SOMETHING had to be looking at that and doing some sort of negotiation. I'm no BIOS guy, so I'm not sure what's actually going on, whether something walks the PCIe tree or if the BIOS just sets all the values to the minimum.

Todd Fujinaka
Technical Marketing Engineer
LAN Access Division (LAD)
Intel Corporation
todd.fujinaka@...el.com
(503) 712-4565

-----Original Message-----
From: Ben Hutchings [mailto:bhutchings@...arflare.com] 
Sent: Tuesday, November 27, 2012 10:11 AM
To: Fujinaka, Todd; Mary Mcgrath
Cc: Joe Jin; netdev@...r.kernel.org; e1000-devel@...ts.sf.net; linux-kernel@...r.kernel.org; linux-pci
Subject: RE: [E1000-devel] 82571EB: Detected Hardware Unit Hang

On Tue, 2012-11-27 at 17:32 +0000, Fujinaka, Todd wrote:
> Forgive me if I'm being too repetitious as I think some of this has 
> been mentioned in the past.
> 
> We (and by we I mean the Ethernet part and driver) can only change the 
> advertised availability of a larger MaxPayloadSize. The size is 
> negotiated by both sides of the link when the link is established. The 
> driver should not change the size of the link as it would be poking at 
> registers outside of its scope and is controlled by the upstream 
> bridge (not us).
[...]

MaxPayloadSize (MPS) is not negotiated between devices but is programmed by the system firmware (at least for devices present at boot - the kernel may be responsible in case of hotplug).  You can use the kernel parameter 'pci=pcie_bus_perf' (or one of several others) to set a policy that overrides this, but no policy will allow setting MPS above the device's MaxPayloadSizeSupported (MPSS).

(These parameters are not documented in
Documentation/kernel-parameters.txt!  Someone ought to fix that.)

Ben.

--
Ben Hutchings, Staff Engineer, Solarflare Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.