linux-kernel - linux-next: manual merge of the driver-core tree with the pci tree

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Message-Id: <20121129150641.a049c1048c4085d339e5f591@canb.auug.org.au>
Date:	Thu, 29 Nov 2012 15:06:41 +1100
From:	Stephen Rothwell <sfr@...b.auug.org.au>
To:	Greg KH <greg@...ah.com>
Cc:	linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
	Bill Pemberton <wfp5p@...ginia.edu>,
	Ian Abbott <abbotti@....co.uk>,
	Bjorn Helgaas <bhelgaas@...gle.com>
Subject: linux-next: manual merge of the driver-core tree with the pci tree

Hi Greg,

Today's linux-next merge of the driver-core tree got a conflict in
drivers/pci/quirks.c between commit 21c5fd97380b ("PCI: Add workaround
for PLX PCI 9050 BAR alignment erratum") from the pci tree and commit
15856ad50bf5 ("PCI: Remove __dev* markings") from the driver-core tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@...b.auug.org.au

diff --cc drivers/pci/quirks.c
index 0c59f7a,22ad3ee..0000000
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@@ -1790,46 -1790,7 +1790,46 @@@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_
  			 PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE,
  			 quirk_tc86c001_ide);
  
 +/*
 + * PLX PCI 9050 PCI Target bridge controller has an errata that prevents the
 + * local configuration registers accessible via BAR0 (memory) or BAR1 (i/o)
 + * being read correctly if bit 7 of the base address is set.
 + * The BAR0 or BAR1 region may be disabled (size 0) or enabled (size 128).
 + * Re-allocate the regions to a 256-byte boundary if necessary.
 + */
- static void __devinit quirk_plx_pci9050(struct pci_dev *dev)
++static void quirk_plx_pci9050(struct pci_dev *dev)
 +{
 +	unsigned int bar;
 +
 +	/* Fixed in revision 2 (PCI 9052). */
 +	if (dev->revision >= 2)
 +		return;
 +	for (bar = 0; bar <= 1; bar++)
 +		if (pci_resource_len(dev, bar) == 0x80 &&
 +		    (pci_resource_start(dev, bar) & 0x80)) {
 +			struct resource *r = &dev->resource[bar];
 +			dev_info(&dev->dev,
 +				 "Re-allocating PLX PCI 9050 BAR %u to length 256 to avoid bit 7 bug\n",
 +				 bar);
 +			r->start = 0;
 +			r->end = 0xff;
 +		}
 +}
 +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
 +			 quirk_plx_pci9050);
 +/*
 + * The following Meilhaus (vendor ID 0x1402) device IDs (amongst others)
 + * may be using the PLX PCI 9050: 0x0630, 0x0940, 0x0950, 0x0960, 0x100b,
 + * 0x1400, 0x140a, 0x140b, 0x14e0, 0x14ea, 0x14eb, 0x1604, 0x1608, 0x160c,
 + * 0x168f, 0x2000, 0x2600, 0x3000, 0x810a, 0x810b.
 + *
 + * Currently, device IDs 0x2000 and 0x2600 are used by the Comedi "me_daq"
 + * driver.
 + */
 +DECLARE_PCI_FIXUP_HEADER(0x1402, 0x2000, quirk_plx_pci9050);
 +DECLARE_PCI_FIXUP_HEADER(0x1402, 0x2600, quirk_plx_pci9050);
 +
- static void __devinit quirk_netmos(struct pci_dev *dev)
+ static void quirk_netmos(struct pci_dev *dev)
  {
  	unsigned int num_parallel = (dev->subsystem_device & 0xf0) >> 4;
  	unsigned int num_serial = dev->subsystem_device & 0xf;

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