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Message-Id: <20121214222251.691036864@linuxfoundation.org>
Date:	Fri, 14 Dec 2012 15:01:15 -0800
From:	Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:	linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc:	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	alan@...rguk.ukuu.org.uk, Lee Jones <lee.jones@...aro.org>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	Philippe Begnic <philippe.begnic@...com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Mike Turquette <mturquette@...aro.org>
Subject: [ 02/27] clk: ux500: fix bit error

3.7-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Linus Walleij <linus.walleij@...aro.org>

commit 2630b17b6ee47ac79b4f5120ac49105027f644ea upstream.

This fixes a bit error in the U8500 clock implementation: the
unused p2_pclk12 registered at bit 12 in periphereral group 6
was defined as using bit 11 rather than bit 12.

When walking over and disabling the unused clocks in the tree
at late init time, p2_pclk12 was disabled, by effectively
clearing the but for p2_pclk11 instead of bit 12 as it should
have, thus disabling gpio block 6 and 7.

Reported-by: Lee Jones <lee.jones@...aro.org>
Acked-by: Ulf Hansson <ulf.hansson@...aro.org>
Cc: Philippe Begnic <philippe.begnic@...com>
Signed-off-by: Linus Walleij <linus.walleij@...aro.org>
Signed-off-by: Mike Turquette <mturquette@...aro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 drivers/clk/ux500/u8500_clk.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -323,7 +323,7 @@ void u8500_clk_init(void)
 	clk_register_clkdev(clk, NULL, "gpioblock1");
 
 	clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", U8500_CLKRST2_BASE,
-				BIT(11), 0);
+				BIT(12), 0);
 
 	clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", U8500_CLKRST3_BASE,
 				BIT(0), 0);


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