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Message-ID: <50CD04F1.8020902@zytor.com>
Date: Sat, 15 Dec 2012 15:17:05 -0800
From: "H. Peter Anvin" <hpa@...or.com>
To: Yinghai Lu <yinghai@...nel.org>
CC: "H. Peter Anvin" <hpa@...ux.intel.com>,
Borislav Petkov <bp@...en8.de>,
"Yu, Fenghua" <fenghua.yu@...el.com>,
"mingo@...nel.org" <mingo@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"linux-tip-commits@...r.kernel.org"
<linux-tip-commits@...r.kernel.org>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Stefano Stabellini <Stefano.Stabellini@...citrix.com>
Subject: Re: [tip:x86/microcode] x86/microcode_intel_early.c: Early update
ucode on Intel's CPU
On 12/15/2012 03:15 PM, Yinghai Lu wrote:
>>
>> That is for the kernel region itself (that code is actually unchanged from
>> the current code), and yes, we could cap that one to _end if there are
>> systems which have bugs in that area. The dynamic page tables map 1G
>> aligned at a time.
>
> dynamic should be 2M too.
>
> AMD system:
>
> http://git.kernel.org/?p=linux/kernel/git/tip/tip.git;a=commitdiff;h=66520ebc2df3fe52eb4792f8101fac573b766baf
>
> BIOS-e820: [mem 0x0000000100000000-0x000000e037ffffff] usable
> BIOS-e820: [mem 0x000000e038000000-0x000000fcffffffff] reserved
> BIOS-e820: [mem 0x0000010000000000-0x0000011ffeffffff] usable
>
> the hole is not 1G aligned.
>
> or HT region is from e040000000 ?
>
The HT region starts at 0xfd00000000 -- after that reserved region, so I
have no idea what that particular system is trying to do or what is
requirements are (nor what its MTRR setup is, since you didn't post it.)
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
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