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Date:	Wed, 19 Dec 2012 23:07:27 +0800
From:	Andrew Cooks <acooks@...il.com>
To:	Chu Ying <gm.ychu@...il.com>
Cc:	"joro@...tes.org" <joro@...tes.org>,
	"xjtuychu@...mail.com" <xjtuychu@...mail.com>,
	"alex.williamson@...hat.com" <alex.williamson@...hat.com>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"jpiszcz@...idpixels.com" <jpiszcz@...idpixels.com>,
	"dwmw2@...radead.org" <dwmw2@...radead.org>,
	"open list:INTEL IOMMU (VT-d)" <iommu@...ts.linux-foundation.org>,
	open list <linux-kernel@...r.kernel.org>,
	"open list:PCI SUBSYSTEM" <linux-pci@...r.kernel.org>
Subject: Re: [RFC PATCH] Fix Intel IOMMU support for Marvell 88SE91xx SATA controllers.

On Wed, Dec 19, 2012 at 9:41 PM, Chu Ying <gm.ychu@...il.com> wrote:
> On 2012-12-19, at 18:58, Andrew Cooks <acooks@...il.com> wrote:
>
>> This is my second attempt to make Marvell 88SE91xx SATA controllers work when IOMMU is enabled.[1][2]
>> +static const struct pci_dev_dma_source_funcs {
>> +    u16 vendor;
>> +    u16 device;
>> +    u8 func_map;    /* bit map. lsb is fn 0. */
>> +} pci_dev_dma_source_funcs[] = {
>> +     {0x1b4b, 0x9172, (1<<0)|(1<<1)},
>> +     { 0 },
>> +};
>
> Can you confirm function 0 should be marked? Per my PCIe trace, I found no function 0 involved in DMA access?
>

Yes. The attached patch disables function 0 for the 0x9172 device. The
attached dmesg output shows the resulting change at time 1.920163 and
fault at time 2.265757.

Download attachment "dmesg_iommu_on_func_1_only.gz" of type "application/x-gzip" (44752 bytes)

Download attachment "func_1_only.patch" of type "application/octet-stream" (845 bytes)

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