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Message-ID: <CAE9FiQWbyA4BgNFsxipdn=Mgc5c5tdSKzwbP_0nvs8BTqR0QUQ@mail.gmail.com>
Date: Wed, 19 Dec 2012 14:47:17 -0800
From: Yinghai Lu <yinghai@...nel.org>
To: "H. Peter Anvin" <hpa@...or.com>
Cc: Jacob Shin <jacob.shin@....com>, Borislav Petkov <bp@...en8.de>,
"H. Peter Anvin" <hpa@...ux.intel.com>,
"Yu, Fenghua" <fenghua.yu@...el.com>,
"mingo@...nel.org" <mingo@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"linux-tip-commits@...r.kernel.org"
<linux-tip-commits@...r.kernel.org>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Stefano Stabellini <Stefano.Stabellini@...citrix.com>
Subject: Re: [tip:x86/microcode] x86/microcode_intel_early.c: Early update
ucode on Intel's CPU
On Wed, Dec 19, 2012 at 2:25 PM, H. Peter Anvin <hpa@...or.com> wrote:
>
> The problem is that before we have awareness of the memory map, we need to
> map things in order to access them. This is a big problem and right now
> there are ridiculous heuristics. I have been working on mapping on demand,
> but there are concerns about the boundaries (i.e. what happens if the
> mapping spill over into a pit like this.)
>
> This kind of stuff is really not acceptable. A region which will cause
> malfunction if prefetched should not be WB in the MTRR system (I include
> TOM* in that.) The real question is what we can do to mitigate the damage.
on demand to only map 2M will help ?
or have to return to v6 version for-x86-boot ?
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