linux-kernel - [PATCH 3/7] arm: zynq: timer: Remove unused #defines

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Message-ID: <b5e8a4a9-732d-4eea-94c8-2ee6b6c6c574@CO9EHSMHS012.ehs.local>
Date:	Tue, 18 Dec 2012 16:16:35 -0800
From:	Soren Brinkmann <soren.brinkmann@...inx.com>
To:	<linux-kernel@...r.kernel.org>,
	Michal Simek <michal.simek@...inx.com>, <monstr@...str.eu>,
	John Linn <john.linn@...inx.com>
CC:	<git@...inx.com>, <josh.cartwright@...com>,
	Soren Brinkmann <soren.brinkmann@...inx.com>
Subject: [PATCH 3/7] arm: zynq: timer: Remove unused #defines

Signed-off-by: Soren Brinkmann <soren.brinkmann@...inx.com>
Acked-by: Michal Simek <michal.simek@...inx.com>
Acked-by: John Linn <john.linn@...inx.com>
---
Michal/John: I took over you ACKs since we applied the same change to the Xilinx
tree recently. Let me know if I should remove them.

 arch/arm/mach-zynq/timer.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c
index f1d224b..80bf474 100644
--- a/arch/arm/mach-zynq/timer.c
+++ b/arch/arm/mach-zynq/timer.c
@@ -39,9 +39,6 @@
 #define XTTCPS_CNT_CNTRL_OFFSET	0x0C /* Counter Control Reg, RW */
 #define XTTCPS_COUNT_VAL_OFFSET	0x18 /* Counter Value Reg, RO */
 #define XTTCPS_INTR_VAL_OFFSET		0x24 /* Interval Count Reg, RW */
-#define XTTCPS_MATCH_1_OFFSET		0x30 /* Match 1 Value Reg, RW */
-#define XTTCPS_MATCH_2_OFFSET		0x3C /* Match 2 Value Reg, RW */
-#define XTTCPS_MATCH_3_OFFSET		0x48 /* Match 3 Value Reg, RW */
 #define XTTCPS_ISR_OFFSET		0x54 /* Interrupt Status Reg, RO */
 #define XTTCPS_IER_OFFSET		0x60 /* Interrupt Enable Reg, RW */
 
-- 
1.8.0.2


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