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Date:	Thu, 20 Dec 2012 12:13:13 +0100
From:	Jiri Olsa <jolsa@...hat.com>
To:	Andi Kleen <andi@...stfloor.org>
Cc:	linux-kernel@...r.kernel.org,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Namhyung Kim <namhyung@...nel.org>,
	Corey Ashford <cjashfor@...ux.vnet.ibm.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Ingo Molnar <mingo@...e.hu>, Paul Mackerras <paulus@...ba.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Subject: Re: [PATCH 3/3] perf tool: Add non arch events for SandyBridge
 microarchitecture

On Wed, Dec 19, 2012 at 01:55:43PM -0800, Andi Kleen wrote:
> Jiri Olsa <jolsa@...hat.com> writes:
> 
> > Adding non architectural event aliases for Sandy Bridge
> > microarchitecture.
> 
> "SandyBridge" is not necessarily unique. There are flavours
> of sandy bridge with slightly different events (e.g. in offcore)
> Also there's uncores too, which are very different between
> different SandyBridges.
> 
> I would merge all these little files into a single file.
> I don't think anyone wants hundreds of new files for this, 
> if you do it for multiple CPUs.

right, that's better

> 
> Besides it would waste insane amounts of space on most file systems
> without tail packing -- each of your little files takes 4K plus an inode
> and directory entry.
> 
> Intel normally uses a spreadsheet CSV format.

Is there anything in public I could download and check?

> 
> Best would be probably to just teach perf about reading one of those
> standard formats, then they could be just downloaded somewhere.

so, when you say standard format.. CSV? like:

BR_MISP_EXEC.ALL_BRANCHES,event=0x89,umask=0xff
BR_MISP_EXEC.COND,event=0x89,umask=0x1
BR_MISP_EXEC.DIRECT_NEAR_CALL,event=0x89,umask=0x10
BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET,event=0x89,umask=0x4
BR_MISP_EXEC.INDIRECT_NEAR_CALL,event=0x89,umask=0x20
BR_MISP_EXEC.NONTAKEN,event=0x89,umask=0x40
BR_MISP_EXEC.RETURN_NEAR,event=0x89,umask=0x8
BR_MISP_EXEC.TAKEN,event=0x89,umask=0x80

would be no big change for alias loader

thanks,
jirka
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