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Message-ID: <20121220.132136.1599315430686323669.hdoyu@nvidia.com>
Date:	Thu, 20 Dec 2012 12:21:36 +0100
From:	Hiroshi Doyu <hdoyu@...dia.com>
To:	"balbi@...com" <balbi@...com>
CC:	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	"grant.likely@...retlab.ca" <grant.likely@...retlab.ca>,
	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	"rob@...dley.net" <rob@...dley.net>,
	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	"swarren@...dotorg.org" <swarren@...dotorg.org>,
	"johnstul@...ibm.com" <johnstul@...ibm.com>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"olof@...om.net" <olof@...om.net>,
	"jason@...edaemon.net" <jason@...edaemon.net>,
	"shawn.guo@...aro.org" <shawn.guo@...aro.org>,
	"andrew@...n.ch" <andrew@...n.ch>,
	"plagnioj@...osoft.com" <plagnioj@...osoft.com>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 3/9] ARM: tegra: # of CPU cores detection w/ & w/o
 HAVE_ARM_SCU

Felipe Balbi <balbi@...com> wrote @ Thu, 20 Dec 2012 11:06:25 +0100:
...
> > @@ -149,7 +154,26 @@ done:
> >   */
> >  static void __init tegra_smp_init_cpus(void)
> >  {
> > -	unsigned int i, ncores = scu_get_core_count(scu_base);
> > +	unsigned int i, cpu_id, ncores;
> > +	u32 l2ctlr;
> > +	phys_addr_t pa;
> > +
> > +	cpu_id = read_cpuid(CPUID_ID) & CPU_MASK;
> > +	switch (cpu_id) {
> > +	case CPU_CORTEX_A15:
> > +		asm("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr));
> > +		ncores = ((l2ctlr >> 24) & 3) + 1;
> > +		break;
> > +	case CPU_CORTEX_A9:
> > +		/* Get SCU physical base */
> > +		asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
> > +		scu_base = IO_ADDRESS(pa);
> > +		ncores = scu_get_core_count(scu_base);
> > +		break;
> > +	default:
> > +		BUG();
> 
> instead of bugging out, how about setting ncores to 1 instead ?

Maybe that would be useful in the case of adding new ARM core in the
future.
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