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Message-ID: <1357489323-21359-3-git-send-email-ldewangan@nvidia.com>
Date:	Sun, 6 Jan 2013 21:52:03 +0530
From:	Laxman Dewangan <ldewangan@...dia.com>
To:	<vinod.koul@...el.com>
CC:	<djbw@...com>, <linux-kernel@...r.kernel.org>,
	<linux-tegra@...r.kernel.org>,
	Laxman Dewangan <ldewangan@...dia.com>
Subject: [PATCH 2/2] dma: tegra: add support for Tegra114 SoC

NVIDIA's Tegra114 has APB DMA controller which has 32 dma channels
and support support channel wise pause control.

Add support for Tegra114 which uses the channel wise pause control
hardware feature.

Signed-off-by: Laxman Dewangan <ldewangan@...dia.com>
---
 drivers/dma/tegra20-apb-dma.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index 1f3ea0f..d33c1ae 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -1217,8 +1217,19 @@ static const struct tegra_dma_chip_data tegra30_dma_chip_data = {
 	.support_channel_pause	= false,
 };
 
+/* Tegra114 specific DMA controller information */
+static const struct tegra_dma_chip_data tegra114_dma_chip_data = {
+	.nr_channels		= 32,
+	.max_dma_count		= 1024UL * 64,
+	.support_channel_pause	= true,
+};
+
+
 static const struct of_device_id tegra_dma_of_match[] = {
 	{
+		.compatible = "nvidia,tegra114-apbdma",
+		.data = &tegra114_dma_chip_data,
+	}, {
 		.compatible = "nvidia,tegra30-apbdma",
 		.data = &tegra30_dma_chip_data,
 	}, {
-- 
1.7.1.1

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