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Message-ID: <eaf72173-bdb9-4839-a8cb-1e80c535aa1e@zimbra>
Date: Tue, 15 Jan 2013 14:34:06 -0600 (CST)
From: Aaron Sierra <asierra@...-inc.com>
To: Agócs Pál <agocs.pal.86@...il.com>
Cc: LKML <linux-kernel@...r.kernel.org>,
Samuel Ortiz <sameo@...ux.intel.com>,
Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [PATCH] lpc_ich: fix gpio base and control offsets
> > #define ACPIBASE_GCS_END 0x3414
> >
> > #define GPIOBASE 0x48
> > +#define GPIOBASE_ICH5 0x58
> > #define GPIOCTRL 0x4C
> > +#define GPIOCTRL_ICH5 0x58
> >
> > #define RCBABASE 0xf0
>
> Aaron,
> A like this corrected patch and a little fix that GPIOCTRL_ICH5 is
> 0x5C
> Is this correct? Thanks!
Yes, of course you're still right about the register offset. Sorry for merging poorly.
-Aaron
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