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Message-ID: <Pine.LNX.4.44L0.1301161004380.1704-100000@iolanthe.rowland.org>
Date: Wed, 16 Jan 2013 10:08:35 -0500 (EST)
From: Alan Stern <stern@...land.harvard.edu>
To: Venu Byravarasu <vbyravarasu@...dia.com>
cc: gregkh@...uxfoundation.org, <balbi@...com>,
<linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<swarren@...dotorg.org>, <linux-doc@...r.kernel.org>,
<linux-tegra@...r.kernel.org>
Subject: Re: [PATCH 4/4] usb: Add APIs to access host registers from Tegra
PHY
On Wed, 16 Jan 2013, Venu Byravarasu wrote:
> As Tegra PHY driver needs to access one of the Host registers,
> added few APIs.
>
> Signed-off-by: Venu Byravarasu <vbyravarasu@...dia.com>
> --- a/drivers/usb/host/ehci-tegra.c
> +++ b/drivers/usb/host/ehci-tegra.c
> @@ -605,6 +619,50 @@ static const struct dev_pm_ops tegra_ehci_pm_ops = {
>
> #endif
>
> +void tegra_ehci_set_wakeon_events(struct usb_phy *x, bool enable)
> +{
> + unsigned long val;
> + struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
> + void __iomem *base = hcd->regs;
> + u32 wake = USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN;
> +
> + val = readl(base + USB_PORTSC1);
> + if (enable)
> + val |= wake;
> + else
> + val &= ~wake;
> + writel(val, base + USB_PORTSC1);
> +}
Here and below, this sort of code is highly questionable. You
evidently don't realize that some of the bits in the PORTSC registers
are R/WC. This means writing a 1 to these bits will clear them.
Consequently it is almost always wrong to read a PORTSC register and
then write back the same (or a slightly modified) value.
Alan Stern
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