linux-kernel - Re: [PATCH v2] lpc_ich: fix gpio base and control offsets

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Message-ID: <CACRpkdYRYBG9jh2h+s1RM5QtgcDNcG9pORWpX462qpNZ4FxkuQ@mail.gmail.com>
Date:	Thu, 17 Jan 2013 14:40:58 +0100
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Aaron Sierra <asierra@...-inc.com>
Cc:	Agócs Pál <agocs.pal.86@...il.com>,
	Samuel Ortiz <sameo@...ux.intel.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] lpc_ich: fix gpio base and control offsets

On Tue, Jan 15, 2013 at 9:42 PM, Aaron Sierra <asierra@...-inc.com> wrote:

> In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
> offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
> properly be enabled (and disabled) for these chipsets.
>
> Signed-off-by: Agócs Pál <agocs.pal.86@...il.com>
> Signed-off-by: Aaron Sierra <asierra@...-inc.com>

Acked-by: Linus Walleij <linus.walleij@...aro.org>
For the GPIO parts. I honestly know very little about PCI.

Yours,
Linus Walleij
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