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Message-ID: <20130118231212.GK4051@tassilo.jf.intel.com>
Date: Fri, 18 Jan 2013 15:12:12 -0800
From: Andi Kleen <ak@...ux.intel.com>
To: Stephane Eranian <eranian@...gle.com>
Cc: linux-kernel@...r.kernel.org, peterz@...radead.org, mingo@...e.hu,
acme@...hat.com, jolsa@...hat.com, namhyung.kim@....com
Subject: Re: [PATCH v6 08/18] perf/x86: add memory profiling via PEBS Load
Latency
> + sample_type = event->attr.sample_type;
> +
> + /*
> + * if PEBS-LL or PreciseStore
> + */
> + if (fll) {
> + if (sample_type & PERF_SAMPLE_ADDR)
> + data.addr = pebs->dla;
> +
> + /*
> + * Use latency for weight (only avail with PEBS-LL)
> + */
> + if (fll && (sample_type & PERF_SAMPLE_WEIGHT))
The extra fll tests here don't make sense because it's always true inside
the if. You could remove the variable and the tests and only check once
in the if.
The rest looks good to me. There will be some conflicts with the Haswell
patches, but either of us can rebase.
Acked-by: Andi Kleen <ak@...ux.intel.com>
-Andi
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