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Message-ID: <CAMLZHHSxC+hAuo4Rjz8EhcXD+wGZmN8FFfPv6QwyZ=nZ+p-r8g@mail.gmail.com>
Date: Sat, 19 Jan 2013 06:34:45 -0600
From: Daniel Drake <dsd@...top.org>
To: "H. Peter Anvin" <hpa@...ux.intel.com>
Cc: Mitch Bradley <wmb@...top.org>,
Jeremy Fitzhardinge <jeremy@...p.org>,
"H. Peter Anvin" <hpa@...or.com>,
Ian Campbell <ian.campbell@...rix.com>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Rusty Russell <rusty@...tcorp.com.au>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Vivek Goyal <vgoyal@...ibm.com>,
"Eric W. Biederman" <ebiederm@...ssion.com>,
Dave Jones <davej@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
David Woodhouse <dwmw2@...radead.org>,
Ingo Molnar <mingo@...nel.org>,
techteam <techteam@...ts.laptop.org>,
Yinghai Lu <yhlu.kernel@...il.com>
Subject: Re: [Techteam] [RFC PATCH] x86-32: Start out eflags and cr4 clean
On Fri, Jan 18, 2013 at 8:35 PM, H. Peter Anvin <hpa@...ux.intel.com> wrote:
> Can we simply disable paging before mucking with CR4? The other option
> that I can see is to always enable PSE and PGE, since they are simply
> features opt-ins that don't do any harm if unused. At the same time,
> though, entering the kernel through the default_entry path with paging
> enabled is definitely not anything the kernel expects.
>
> Does this patch work for you? Since we have ditched 386 support, we can
> mimic x86-64 (yay, one more difference gone!) and just use a predefined
> value for %cr0 (the FPU flags need to change if we are on an FPU-less
> chip, but that happens during FPU probing.)
The patch fixes boot on XO-1.5. Thanks for the quick response!
Daniel
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