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Message-ID: <CABPqkBT1m9bfKjBihT8LJrPHOif0jq_ZTd5rBD99Eyz=6GNMKg@mail.gmail.com>
Date:	Fri, 25 Jan 2013 14:16:36 +0100
From:	Stephane Eranian <eranian@...gle.com>
To:	Jacob Shin <jacob.shin@....com>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, x86 <x86@...nel.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH RESEND V5 5/6] perf, x86: Allow for architecture specific
 RDPMC indexes

On Thu, Jan 10, 2013 at 8:50 PM, Jacob Shin <jacob.shin@....com> wrote:
> Similar to config_base and event_base, allow architecture specific
> RDPMC ECX values.
>
> Signed-off-by: Jacob Shin <jacob.shin@....com>
Acked-by: Stephane Eranian <eranian@...gle.com>

> ---
>  arch/x86/kernel/cpu/perf_event.c     |    2 +-
>  arch/x86/kernel/cpu/perf_event.h     |    6 ++++++
>  arch/x86/kernel/cpu/perf_event_amd.c |    6 ++++++
>  3 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
> index 4428fd1..b63982b 100644
> --- a/arch/x86/kernel/cpu/perf_event.c
> +++ b/arch/x86/kernel/cpu/perf_event.c
> @@ -835,7 +835,7 @@ static inline void x86_assign_hw_event(struct perf_event *event,
>         } else {
>                 hwc->config_base = x86_pmu_config_addr(hwc->idx);
>                 hwc->event_base  = x86_pmu_event_addr(hwc->idx);
> -               hwc->event_base_rdpmc = hwc->idx;
> +               hwc->event_base_rdpmc = x86_pmu_rdpmc_index(hwc->idx);
>         }
>  }
>
> diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
> index 4440218..c910657 100644
> --- a/arch/x86/kernel/cpu/perf_event.h
> +++ b/arch/x86/kernel/cpu/perf_event.h
> @@ -326,6 +326,7 @@ struct x86_pmu {
>         unsigned        eventsel;
>         unsigned        perfctr;
>         int             (*addr_offset)(int index, int eventsel);
> +       int             (*rdpmc_index)(int index);
>         u64             (*event_map)(int);
>         int             max_events;
>         int             num_counters;
> @@ -459,6 +460,11 @@ static inline unsigned int x86_pmu_event_addr(int index)
>                 (x86_pmu.addr_offset ? x86_pmu.addr_offset(index, 0) : index);
>  }
>
> +static inline int x86_pmu_rdpmc_index(int index)
> +{
> +       return x86_pmu.rdpmc_index ? x86_pmu.rdpmc_index(index) : index;
> +}
> +
>  int x86_setup_perfctr(struct perf_event *event);
>
>  int x86_pmu_hw_config(struct perf_event *event);
> diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
> index ef1df38..faf9072 100644
> --- a/arch/x86/kernel/cpu/perf_event_amd.c
> +++ b/arch/x86/kernel/cpu/perf_event_amd.c
> @@ -173,6 +173,11 @@ static inline int amd_pmu_addr_offset(int index, int eventsel)
>         return offset;
>  }
>
> +static inline int amd_pmu_rdpmc_index(int index)
> +{
> +       return index;
> +}
> +
>  static int amd_pmu_hw_config(struct perf_event *event)
>  {
>         int ret;
> @@ -620,6 +625,7 @@ static __initconst const struct x86_pmu amd_pmu = {
>         .eventsel               = MSR_K7_EVNTSEL0,
>         .perfctr                = MSR_K7_PERFCTR0,
>         .addr_offset            = amd_pmu_addr_offset,
> +       .rdpmc_index            = amd_pmu_rdpmc_index,
>         .event_map              = amd_pmu_event_map,
>         .max_events             = ARRAY_SIZE(amd_perfmon_event_map),
>         .num_counters           = AMD64_NUM_COUNTERS,
> --
> 1.7.9.5
>
>
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