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Date:	Mon, 28 Jan 2013 17:10:38 +0100
From:	Andi Kleen <andi@...stfloor.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	Andi Kleen <andi@...stfloor.org>, Ingo Molnar <mingo@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Jiri Olsa <jolsa@...hat.com>,
	Namhyung Kim <namhyung@...nel.org>,
	Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 01/12] perf, x86: Add PEBSv2 record support

> I think you should call this: PEBS v3 and not v2.

v2 is the version number in the enumeration register.
It would be confusing to use a different numbering than Intel does.
That's also the numbering that is printed in dmesg.

> We already have 2 existing formats: core and nhm.
> You're adding the hsw format.
> 
> So either you add it as struct pebs_record_hsw or you
> cleanup the naming of all the structs and call them:

core is v0.

> 
> struct pebs_record_v1 /* core */
> struct pebs_record_v2 /* nhm, snb, ivb */
> struct pebs_record_v3 /* hsw */
> 
> That would seem more consistent to me.

I personally don't see a lot of need for a rename, but I can send 
a followon patch to rename nhm to v1 and core to v0. I will do that
separately because people are already complaining that the patchkit
is too big, and it doesn't really affect the functionality.

-Andi
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