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Message-ID: <20130206122239.GH3073@tbergstrom-lnx.Nvidia.com>
Date: Wed, 6 Feb 2013 14:22:39 +0200
From: Peter De Schrijver <pdeschrijver@...dia.com>
To: Laxman Dewangan <ldewangan@...dia.com>
CC: Stephen Warren <swarren@...dia.com>,
"mturquette@...aro.org" <mturquette@...aro.org>,
Prashant Gaikwad <pgaikwad@...dia.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>
Subject: Re: [PATCH] clk: tegra: initialise parent of uart clocks
On Wed, Feb 06, 2013 at 11:47:41AM +0100, Laxman Dewangan wrote:
> Initialise the parent of UARTs to PLLP and disabling clock by
> default.
>
I wonder if we should move the parent definitions to DT at some point.
Cheers,
Peter.
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