lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5112964D.50707@wwwdotorg.org>
Date:	Wed, 06 Feb 2013 10:43:41 -0700
From:	Stephen Warren <swarren@...dotorg.org>
To:	Laxman Dewangan <ldewangan@...dia.com>
CC:	swarren@...dia.com, mturquette@...aro.org, pgaikwad@...dia.com,
	linux-kernel@...r.kernel.org, linux-tegra@...r.kernel.org
Subject: Re: [PATCH] clk: tegra: initialise parent of uart clocks

On 02/06/2013 03:47 AM, Laxman Dewangan wrote:
> Initialise the parent of UARTs to PLLP

OK

> and disabling clock by default.

Hmm. Only the clocks initialized by the new entries you added are marked
disabled (or rather, not actively enabled; if they're enabled already,
they won't be disabled). We should treat all UARTs equally. Historically
we've needed to enable the serial clocks forcibly since the regular
serial driver didn't call clk_get() or clk_prepare_enable() on any
clocks, but I notice that it does now, since sometime in kernel 3.8. As
such, I think you can modify all the UART entries in these tables to
have the enable/state field set to false (0). Can you try that and check
that it works for the serial console ports? Thanks.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ