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Message-ID: <20130207161809.GQ3073@tbergstrom-lnx.Nvidia.com>
Date: Thu, 7 Feb 2013 18:18:09 +0200
From: Peter De Schrijver <pdeschrijver@...dia.com>
To: Prashant Gaikwad <pgaikwad@...dia.com>
CC: Grant Likely <grant.likely@...retlab.ca>,
Rob Herring <rob.herring@...xeda.com>,
Rob Landley <rob@...dley.net>,
Stephen Warren <swarren@...dotorg.org>,
Russell King <linux@....linux.org.uk>,
Simon Glass <sjg@...omium.org>,
Mike Turquette <mturquette@...aro.org>,
Joseph Lo <josephl@...dia.com>,
"devicetree-discuss@...ts.ozlabs.org"
<devicetree-discuss@...ts.ozlabs.org>,
"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v5 09/10] clk: tegra: Implement clocks for Tegra114
>
> > > + /* xusb_hs_src */
> > > + val = readl(clk_base + CLK_SOURCE_XUSB_SS_SRC);
> > > + val |= BIT(25); /* always select PLLU_60M */
> > > + writel(val, clk_base + CLK_SOURCE_XUSB_SS_SRC);
> > > +
> > > + clk = clk_register_fixed_factor(NULL, "xusb_hs_src", "pll_u_60M", 0,
> > > + 1, 1);
> > > + clks[xusb_hs_src] = clk;
> > > +
> >
> > With device tree we can directly use pll_u_60M, no need to register
> > clock with fixed factor 1.
>
> This is true for now. In the future these clocks will need to be dvfs aware
> though. I think it makes sense to have a separate clock then?
>
As this seems to be a different clock (ie. the hw allows you to select a
different parent), I think keeping this node makes sense.
Cheers,
Peter.
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