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Message-ID: <18557aed-383a-4454-8222-3d2c0f0a78be@email.android.com>
Date:	Mon, 11 Feb 2013 07:49:14 -0800
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Borislav Petkov <bp@...en8.de>
CC:	X86 ML <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>,
	Borislav Petkov <bp@...e.de>
Subject: Re: [PATCH 3/4] x86, head_32: Remove second CPUID detection from default_entry

What about CPUs with inconsistent cpuid levels?  Yes, they can and do happen, as we discussed on IRC.

Borislav Petkov <bp@...en8.de> wrote:

>From: Borislav Petkov <bp@...e.de>
>
>We do that once earlier now and cache it into new_cpu_data.cpuid_level
>so no need for the EFLAGS.ID toggling dance anymore.
>
>Signed-off-by: Borislav Petkov <bp@...e.de>
>---
> arch/x86/kernel/head_32.S | 17 ++++-------------
> 1 file changed, 4 insertions(+), 13 deletions(-)
>
>diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
>index 73e084a6d2c5..e893ac09ca03 100644
>--- a/arch/x86/kernel/head_32.S
>+++ b/arch/x86/kernel/head_32.S
>@@ -410,18 +410,7 @@ default_entry:
> /*
>  * Check if it is 486
>  */
>-	movl $-1,X86_CPUID	# -1 for no CPUID initially
>-	movb $4,X86		# at least 486
>-	pushfl			# push EFLAGS
>-	popl %eax		# get EFLAGS
>-	movl %eax,%ecx		# save original EFLAGS
>-	xorl $0x200000,%eax	# flip ID bit in EFLAGS
>-	pushl %eax		# copy to EFLAGS
>-	popfl			# set EFLAGS
>-	pushfl			# get new EFLAGS
>-	popl %eax		# put it in eax
>-	xorl %ecx,%eax		# change in flags
>-	testl $0x200000,%eax	# check if ID bit changed
>+	cmpl $-1,X86_CPUID
> 	je is486
> 
> 	/* get vendor info */
>@@ -447,7 +436,9 @@ default_entry:
> 	movb %cl,X86_MASK
> 	movl %edx,X86_CAPABILITY
> 
>-is486:	movl $0x50022,%ecx	# set AM, WP, NE and MP
>+is486:
>+	movb $4,X86
>+	movl $0x50022,%ecx	# set AM, WP, NE and MP
> 	movl %cr0,%eax
> 	andl $0x80000011,%eax	# Save PG,PE,ET
> 	orl %ecx,%eax

-- 
Sent from my mobile phone. Please excuse brevity and lack of formatting.
--
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