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Message-ID: <511928B2.6000302@zytor.com>
Date:	Mon, 11 Feb 2013 09:21:54 -0800
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Borislav Petkov <bp@...en8.de>, X86 ML <x86@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>, Borislav Petkov <bp@...e.de>
Subject: Re: [PATCH 3/4] x86, head_32: Remove second CPUID detection from
 default_entry

On 02/11/2013 09:15 AM, Borislav Petkov wrote:
> On Mon, Feb 11, 2013 at 07:49:14AM -0800, H. Peter Anvin wrote:
>> What about CPUs with inconsistent cpuid levels? Yes, they can and do
>> happen, as we discussed on IRC.
>
> Yes, this should still work. We're doing the EFLAGS.ID dance right at
> the beginning of default_entry on each cpu and cache cpuld level in
> new_cpu_data for the time we're in this code.
>
> What this particular patch removes is the yet-another EFLAGS.ID dance
> which we IMHO unnecessarily did after enabling paging.
>
> So basically nothing changes wrt handling inconsistent cpuid levels and
> MSR mis-programming - we still should be taking care of those cases.
>

Cool.  I misread your 0/4 cover and hadn't quite dug into the details yet.

	-hpa


-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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