>From mc74hc00@gmail.com Mon Jan 14 03:02:31 2013 Return-path: Envelope-to: wim@infomag.iguana.be Delivery-date: Mon, 14 Jan 2013 03:02:31 +0100 Received: from ylaen.iguana.be ([178.21.116.169]) by spo001.leaseweb.com with esmtp (Exim 4.50) id 1TuZNf-0006Zu-2q for wim@infomag.iguana.be; Mon, 14 Jan 2013 03:02:31 +0100 Received: from mail-da0-f51.google.com (mail-da0-f51.google.com [209.85.210.51]) by ylaen.iguana.be (Postfix) with ESMTP id AEAA3174278 for ; Mon, 14 Jan 2013 03:02:30 +0100 (CET) Received: by mail-da0-f51.google.com with SMTP id i30so1585773dad.10 for ; Sun, 13 Jan 2013 18:02:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=xr96DHGo9AJimFBvpkiDW9J9bvC1hncA+l9AGfPz2kI=; b=jZJA2gZXsnoyhJbUNH0wc16xsOEDDa0p3aqqoOF+QkZ69Tj4qKpV+MObEisJwEqJlH FQS2N0o7PIVwMoD4bxB3es1Du10awk91rAqTdq1FPxVzsOfmfxoLbXH78pbK9ZNt2BTn f7Cq0kjpK5IAC+rnTz5HLC8X/gC4AbzLNmmhk/7+BNUfbXTPgbwvYMkJ14DOaZBzbzQC ZnaU17gsZMecQBjraKjmisAVG6DwXq4amD3n5xZLDc/yqJ//DsUhmd7kCbpXBbyazBLn yX4i+278KwYIkYR3DiOIv48SBN24qrXo+WeGhMsR3JIrDKpHhjs1Nqd38+YSF5bcDdsY p8cQ== X-Received: by 10.66.52.102 with SMTP id s6mr228245938pao.6.1358128949874; Sun, 13 Jan 2013 18:02:29 -0800 (PST) Received: from localhost (p7204-ipngn2902marunouchi.tokyo.ocn.ne.jp. [180.47.244.204]) by mx.google.com with ESMTPS id ug6sm7227632pbc.4.2013.01.13.18.02.26 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sun, 13 Jan 2013 18:02:28 -0800 (PST) From: Takahisa Tanaka To: linux-watchdog@vger.kernel.org Cc: Wim Van Sebroeck , Paul Menzel , Arkadiusz Miskiewicz , Bjorn Helgaas , Andrew Morton , Jonathan Nieder , linux-kernel@vger.kernel.org, Florian Mickler , Takahisa Tanaka Subject: [PATCH 2/2] watchdog: sp5100_tco: Write back the original value to reserved bits, instead of zero Date: Mon, 14 Jan 2013 11:01:58 +0900 Message-Id: <1358128918-4415-2-git-send-email-mc74hc00@gmail.com> X-Mailer: git-send-email 1.7.11.7 In-Reply-To: <1358128918-4415-1-git-send-email-mc74hc00@gmail.com> References: <1358128918-4415-1-git-send-email-mc74hc00@gmail.com> Content-Length: 2279 Lines: 69 In case of SP5100 or SB7x0 chipsets, the sp5100_tco module writes zero to reserved bits. The module, however, shouldn't depend on specific default value, and should perform a read-merge-write operation for the reserved bits. This patch makes the sp5100_tco module perform a read-merge-write operation on all the chipset (sp5100, sb7x0, sb8x0 or later). Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43176 Signed-off-by: Takahisa Tanaka Signed-off-by: Wim Van Sebroeck --- drivers/watchdog/sp5100_tco.c | 28 ++++++++-------------------- 1 file changed, 8 insertions(+), 20 deletions(-) diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c index 5dfe86e..e3b8f75 100644 --- a/drivers/watchdog/sp5100_tco.c +++ b/drivers/watchdog/sp5100_tco.c @@ -361,7 +361,7 @@ static unsigned char sp5100_tco_setupdevice(void) { struct pci_dev *dev = NULL; const char *dev_name = NULL; - u32 val; + u32 val, tmp_val; u32 index_reg, data_reg, base_addr; /* Match the PCI device */ @@ -497,31 +497,19 @@ static unsigned char sp5100_tco_setupdevice(void) pr_debug("Got 0x%04x from resource tree\n", val); } - /* Restore to the low three bits, if chipset is SB8x0(or later) */ - if (sp5100_tco_pci->revision >= 0x40) { - u8 reserved_bit; - outb(base_addr+0, index_reg); - reserved_bit = inb(data_reg) & 0x7; - val |= (u32)reserved_bit; - } + /* Restore to the low three bits */ + outb(base_addr+0, index_reg); + tmp_val = val | (inb(data_reg) & 0x7); /* Re-programming the watchdog timer base address */ outb(base_addr+0, index_reg); - /* Low three bits of BASE are reserved */ - outb((val >> 0) & 0xff, data_reg); + outb((tmp_val >> 0) & 0xff, data_reg); outb(base_addr+1, index_reg); - outb((val >> 8) & 0xff, data_reg); + outb((tmp_val >> 8) & 0xff, data_reg); outb(base_addr+2, index_reg); - outb((val >> 16) & 0xff, data_reg); + outb((tmp_val >> 16) & 0xff, data_reg); outb(base_addr+3, index_reg); - outb((val >> 24) & 0xff, data_reg); - - /* - * Clear unnecessary the low three bits, - * if chipset is SB8x0(or later) - */ - if (sp5100_tco_pci->revision >= 0x40) - val &= ~0x7; + outb((tmp_val >> 24) & 0xff, data_reg); if (!request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE, dev_name)) { -- 1.7.11.7