linux-kernel - Re: [PATCH 05/73] ARM: ux500: Vsmps3 controlled by SysClkReq1

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Message-ID: <512C8B89.6060303@stericsson.com>
Date:	Tue, 26 Feb 2013 11:16:41 +0100
From:	Bengt Jönsson <bengt.g.jonsson@...ricsson.com>
To:	Lee Jones <lee.jones@...aro.org>
Cc:	Mark Brown <broonie@...nsource.wolfsonmicro.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Ulf Hansson <ulf.hansson@...aro.org>
Subject: Re: [PATCH 05/73] ARM: ux500: Vsmps3 controlled by SysClkReq1

On 02/26/2013 10:44 AM, Lee Jones wrote:
> On Tue, 05 Feb 2013, Mark Brown wrote:
>
>> On Mon, Feb 04, 2013 at 10:21:36PM +0100, Linus Walleij wrote:
>>
>>> What is needed is some way to model that
>>> electronic relationship into both the regulator
>>> and clock subsystems (Ulf Hansson is working on
>>> the ABx500 clocks as we speak.)
>>> Maybe the actual place to have it would be
>>> somewhere like drivers/mfd/ab8500-core.c.
>>> Have you seen similar stuff in other PMICs?
>> Yes, it's fairly common to at least have hardware enable signals.  If
>> what was going on was actually understood by the driver in some way it
>> might be better but right now...  Especially in a series like this it's
>> really bad to just see loads of patches which boil down to "change the
>> semi-documented magic value" - this just makes the series depressing to
>> read.
> Okay, I've just re-read this thread and it appears you're both talking
> about different things.
>
> Linus is talking about a discussion with Bengt regarding how these
> strange sysclkreq thingies work. When I first read the code they
> appear to be equivalent to GPIO regulators, but in actual fact the
> hardware logic is different on enable/disable. So they probably don't
> belong in regulator code at all.
>
> Where as, Mark is complaining about how the regulators are initialised
> by lots of magic register writes during init. Although, comments are
> inserted for each of the values, they're by no means exhaustive and
> aren't really even helpful if you don't have the uber-s3cr3t design
> specification. What he would like to see is that most of this stuff
> being handled by the framework. Some of this stuff is clearly only
> setting voltages and power-states and the like.
>
> I'd certainly be up for taking this on, but I think an in-depth
> knowledge of the AB8500 regulator subsystem would be required.
>
We got a comment about this some years before and then I thought that it 
was best to just initialise the registers because (1) there are many 
settings that could not be handled by the regulator framework and (2) 
many settings are mixed up in same registers which would lead to many 
more write operations. The risk is also that everything gets more 
complicated if we mix regulator framework initialisation with our own 
initialisation.

I still doubt that letting the framework initialise the regulator 
registers is the way to go but of course we should have a look at it. I 
agree that the current code is depressing, it does not provide much 
understanding. I can go through the register initialisation and propose 
what to do with each bit.


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