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Message-ID: <20130227082335.GB30395@linux-sh.org>
Date: Wed, 27 Feb 2013 17:23:38 +0900
From: Paul Mundt <lethal@...ux-sh.org>
To: Magnus Damm <magnus.damm@...il.com>
Cc: linux-kernel@...r.kernel.org, linux-sh@...r.kernel.org,
benh@...nel.crashing.org, grant.likely@...retlab.ca,
horms@...ge.net.au, tglx@...utronix.de
Subject: Re: [PATCH] irqchip: Renesas INTC External IRQ pin driver
On Mon, Feb 18, 2013 at 11:28:34PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm@...nsource.se>
>
> This patch adds a driver for external IRQ pins connected
> to the INTC block on recent SoCs from Renesas.
>
So how exactly does this interact with the existing sh_intc code? Or is
there some reason why you have opted to bypass it in order to implement a
simplified reduced-functionality version of INTC support focused only on
external pins? If both are used together this is going to be a nightmare
for locking, and it's also non-obvious how the IRQ domains on both sides
will interact.
This needs a lot more explanation.
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