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Message-ID: <20130305062717.GA5340@feng-snb>
Date:	Tue, 5 Mar 2013 14:27:17 +0800
From:	Feng Tang <feng.tang@...el.com>
To:	Jason Gunthorpe <jgunthorpe@...idianresearch.com>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	John Stultz <john.stultz@...aro.org>,
	Ingo Molnar <mingo@...e.hu>,
	"H. Peter Anvin" <hpa@...ux.intel.com>, x86@...nel.org,
	Len Brown <lenb@...nel.org>,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	linux-kernel@...r.kernel.org, gong.chen@...ux.intel.com
Subject: Re: [RFC PATCH v2 0/4] Add support for S3 non-stop TSC support.

On Mon, Mar 04, 2013 at 09:32:03PM -0700, Jason Gunthorpe wrote:
> On Tue, Mar 05, 2013 at 11:53:02AM +0800, Feng Tang wrote:

> > > You may want to also CC the maintainers of all the ARM subsystems that
> > > use read_persistent_clock and check with them to ensure this new
> > > interface will let them migrate their implementations as well.
> > 
> > Maybe I didn't get it well, my patches didn't change the
> > read_persistent_clock(), but inject a new way of counting suspended
> > time. It should have no functional changes to existing platforms.
> 
> Right, your patches are fine stand alone.
> 
> The ARM case of plat-omap/counter_32k.c would ideally be converted to
> use your new API though, that is what I ment about involving them.

I see now. Yes, the counter_32k could be converted to a clocksource
with SUSPEND_NONSTOP flag set, and no need for it to use the
read_persistent_clock any more.

> 
> I'm not sure about mach-tegra/timer.c though - it seems to be using a
> counter as well but somehow sharing registers with the RTC?

I just searched the 3.9-rc1 code, seems the file has been moved to
drivers/clocksource/tegra20_timer.c, and its persistent clock seems
to also be based on a RTC like device.

Thanks,
Feng

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