linux-kernel - Re: [PATCH LINUX v5] xen: event channel arrays are xen_ulong

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Message-ID: <1362455124.8941.19.camel@hastur.hellion.org.uk>
Date:	Tue, 5 Mar 2013 03:45:24 +0000
From:	Ian Campbell <ian.campbell@...rix.com>
To:	Will Deacon <will.deacon@....com>
CC:	Rob Herring <robherring2@...il.com>,
	"xen-devel@...ts.xen.org" <xen-devel@...ts.xen.org>,
	"Keir (Xen.org)" <keir@....org>,
	"Stefano Stabellini" <Stefano.Stabellini@...citrix.com>,
	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	"Tim (Xen.org)" <tim@....org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Jan Beulich <JBeulich@...e.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Nicolas Pitre <nico@...xnic.net>
Subject: Re: [PATCH LINUX v5] xen: event channel arrays are xen_ulong_t and
 not unsigned long

On Tue, 2013-03-05 at 03:04 +0000, Will Deacon wrote:
> Hi guys,
> 
> On Mon, Mar 04, 2013 at 02:45:33AM +0000, Rob Herring wrote:
> > On 02/20/2013 05:48 AM, Ian Campbell wrote:
> > > On ARM we want these to be the same size on 32- and 64-bit.
> > > 
> > > This is an ABI change on ARM. X86 does not change.
> > > 
> > > Signed-off-by: Ian Campbell <ian.campbell@...rix.com>
> > > Cc: Jan Beulich <JBeulich@...e.com>
> > > Cc: Keir (Xen.org) <keir@....org>
> > > Cc: Tim Deegan <tim@....org>
> > > Cc: Stefano Stabellini <stefano.stabellini@...citrix.com>
> > > Cc: linux-arm-kernel@...ts.infradead.org
> > > Cc: xen-devel@...ts.xen.org
> > > Cc: Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
> 
> [...]
> 
> > I'm seeing some some build failures on randconfig builds with this change:
> > 
> > /tmp/ccJaIZOW.s: Assembler messages:
> > /tmp/ccJaIZOW.s:831: Error: even register required -- `ldrexd r5,r6,[r4]'
> > 
> > This is with ubuntu 12.04 cross compiler (gcc version 4.6.3
> > (Ubuntu/Linaro 4.6.3-1ubuntu5)).
> > 
> > This register restriction is on ARM, but not Thumb builds. Comparing
> > this to atomic64_cmpxchg, I don't see how to fix this. Perhaps Will or
> > Nico have thoughts.
> 
> [...]
> 
> > > +	asm volatile("@ xchg_xen_ulong\n"
> > > +		"1:     ldrexd  %0, %H0, [%3]\n"
> > > +		"       strexd  %1, %2, %H2, [%3]\n"
> > > +		"       teq     %1, #0\n"
> > > +		"       bne     1b"
> > > +		: "=&r" (oldval), "=&r" (tmp)
> > > +		: "r" (val), "r" (ptr)
> > > +		: "memory", "cc");
> 
> I also can't immediately see why GCC would allocate oldval to an odd base
> register. Can you share your .config please?

I fixed something along these lines before v5 of this patch, although I
must confess I don't recall what it was that I changed (and looking at
the older versions of the patch isn't giving me any clues). I can't
reproduce it now though :-(

I'm using the 4.6.3 cross compiler from kernel.org:
ftp://ftp.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/

Ian.

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