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Message-ID: <CABPqkBTLcJ2NuRJZa0bdM8uZrjf2APz0tE2wW9_u4LLBLv53ng@mail.gmail.com>
Date: Fri, 15 Mar 2013 21:56:42 +0100
From: Stephane Eranian <eranian@...gle.com>
To: Shuah Khan <shuahkhan@...il.com>
Cc: Greg KH <gregkh@...uxfoundation.org>,
LKML <linux-kernel@...r.kernel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Peter Zijlstra <peterz@...radead.org>,
"mingo@...e.hu" <mingo@...e.hu>,
Thomas Gleixner <tglx@...utronix.de>,
Andrew Morton <akpm@...ux-foundation.org>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Jiri Olsa <jolsa@...hat.com>,
"ak@...ux.intel.com" <ak@...ux.intel.com>
Subject: Re: [PATCH] perf,x86: fix kernel crash with PEBS/BTS after suspend/resume
On Fri, Mar 15, 2013 at 9:53 PM, Shuah Khan <shuahkhan@...il.com> wrote:
> On Fri, Mar 15, 2013 at 2:31 PM, Greg KH <gregkh@...uxfoundation.org> wrote:
>> On Fri, Mar 15, 2013 at 02:26:07PM +0100, Stephane Eranian wrote:
>>>
>>> This patch fixes a kernel crash when using precise sampling (PEBS)
>>> after a suspend/resume. Turns out the CPU notifier code is not invoked
>>> on CPU0 (BP). Therefore, the DS_AREA (used by PEBS) is not restored properly
>>> by the kernel and keeps it power-on/resume value of 0 causing any PEBS
>>> measurement to crash when running on CPU0.
>>>
>>> The workaround is to add a hook in the actual resume code to restore
>>> the DS Area MSR value. It is invoked for all CPUS. So for all but CPU0,
>>> the DS_AREA will be restored twice but this is harmless.
>>>
>>> Reported-by: Linus Torvalds <torvalds@...ux-foundation.org>
>>> Signed-off-by: Stephane Eranian <eranian@...gle.com>
>>> ---
>>
>> Is this needed for the 3.8 or older kernels as well?
>>
>> thanks,
>>
>> greg k-h
>
> Just about to ask the same question. Patch applies to 3.8, 3.4, 3.2
> and 3.5. But needs some massaging for 3.0. I have the kernels built,
> haven't started testing yet.
>
Testing the patch is easy:
# echo mem >/sys/power/state
Then press the power button again, when you get control again, type:
$ taskset -c 0 perf record -e cycles:pp my_test_program
Note that this problem impacts only Intel processors after Core 2
(PEBS enabled).
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