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Message-ID: <D958900912E20642BCBC71664EFECE3E6E5092FFE5@BGMAIL02.nvidia.com>
Date:	Wed, 20 Mar 2013 17:45:43 +0530
From:	Venu Byravarasu <vbyravarasu@...dia.com>
To:	kishon <kishon@...com>
CC:	"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
	"stern@...land.harvard.edu" <stern@...land.harvard.edu>,
	"balbi@...com" <balbi@...com>,
	"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"swarren@...dotorg.org" <swarren@...dotorg.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>
Subject: RE: [PATCH 1/7] ARM: tegra: finalize USB EHCI and PHY bindings

> -----Original Message-----
> From: kishon [mailto:kishon@...com]
> Sent: Wednesday, March 20, 2013 4:49 PM
> To: Venu Byravarasu
> Cc: gregkh@...uxfoundation.org; stern@...land.harvard.edu;
> balbi@...com; linux-usb@...r.kernel.org; linux-kernel@...r.kernel.org;
> swarren@...dotorg.org; linux-tegra@...r.kernel.org; devicetree-
> discuss@...ts.ozlabs.org
> Subject: Re: [PATCH 1/7] ARM: tegra: finalize USB EHCI and PHY bindings
> 
> Hi,
> 
> On Monday 18 March 2013 05:59 PM, Venu Byravarasu wrote:
> > The existing Tegra USB bindings have a few issues:
> >
> > 1) Many properties are documented as being part of the EHCI controller
> > node, yet they apply more to the PHY device. They should be moved.
> >
> > 2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a
> > reg entry to point at PHY1's register space. We can't assume the PHY1
> > driver is present, so the PHY3 driver will directly access those
> > registers.
> >
> > 3) The list of clocks required by the PHY was missing some required
> > entries.
> >
> > This patch fixes the binding definition to resolve these issues.
> >
> > Signed-off-by: Venu Byravarasu <vbyravarasu@...dia.com>
> > ---
> >   .../bindings/usb/nvidia,tegra20-ehci.txt           |   27 +++----------------
> >   .../bindings/usb/nvidia,tegra20-usb-phy.txt        |   27
> +++++++++++++++++--
> >   2 files changed, 29 insertions(+), 25 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
> b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
> > index 34c9528..df09330 100644
> > --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
> > +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
> > @@ -6,27 +6,10 @@ Practice : Universal Serial Bus" with the following
> modifications
> >   and additions :
> >
> >   Required properties :
> > - - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
> > -   used in host mode.
> > - - phy_type : Should be one of "ulpi" or "utmi".
> >
> >   Optional properties:
> > -  - dr_mode : dual role mode. Indicates the working mode for

> > index 6bdaba2..7ceccd3 100644
> > --- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
> > +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
> > @@ -4,8 +4,24 @@ The device node for Tegra SOC USB PHY:
> >
> >   Required properties :
> > + - phy_type : Should be one of "utmi", "ulpi" or "hsic".
> 
> dt property names generally dont have "_".

Thanks Kishon, for your comments.
Is it mandatory or optional?
If it is mandatory, then I might have to change dr_mode as well along with phy_type.
 
> 
> Thanks
> Kishon
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