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Message-ID: <20130326223953.15072.26605.stgit@djiang5-linux2.ch.intel.com>
Date:	Tue, 26 Mar 2013 15:42:29 -0700
From:	Dave Jiang <dave.jiang@...el.com>
To:	djbw@...com
Cc:	vinod.koul@...el.com, linux-kernel@...r.kernel.org
Subject: [PATCH 00/10] Add Intel Atom S1200 seris ioatdma support

The following series adds support for the Intel Atom S1200 product family
ioatdma. This ioatdma also implements a set of version v3.3 features such as 16
sources PQ, descriptor write back error status, and does not have many of the
silicon bugs that the 3.2 line of hardware has due to a brand new implemention.

The series is dependent on the haswell update patch sent prior.

---

Dave Jiang (10):
      ioatdma: Adding PCI IDs for Intel Atom S1200 product family ioatdma devices
      ioatdma: Add 64bit chansts register read for ioat v3.3.
      ioatdma: channel reset scheme fixup on Intel Atom S1200 platforms
      ioatdma: Removing hw bug workaround for CB3.x .2 and earlier
      ioatdma: skip legacy reset bits since v3.3 plattform doesn't need it
      ioatdma: Removing PQ val disable for cb3.3
      ioatdma: skip silicon bug workaround for pq_align for cb3.3
      ioatdma: Adding support for 16 src PQ ops and super extended descriptors
      ioatdma: Adding write back descriptor error status support for ioatdma 3.3
      ioatdma: S1200 platforms ioatdma channel 2 and 3 falsely advertise RAID cap


 drivers/dma/Kconfig          |    2 
 drivers/dma/ioat/dma.c       |   14 +
 drivers/dma/ioat/dma.h       |   59 +++
 drivers/dma/ioat/dma_v2.h    |    2 
 drivers/dma/ioat/dma_v3.c    |  930 ++++++++++++++++++++++++++++++++++++------
 drivers/dma/ioat/hw.h        |   66 +++
 drivers/dma/ioat/pci.c       |    9 
 drivers/dma/ioat/registers.h |    4 
 8 files changed, 941 insertions(+), 145 deletions(-)

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