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Message-ID: <CANEJEGtu-pMK+JRYYUjA47F5GqSRmNrR0KfTwHdXkMXNgLnpbQ@mail.gmail.com>
Date: Wed, 27 Mar 2013 10:40:25 -0700
From: Grant Grundler <grundler@...omium.org>
To: Grant Grundler <grundler@...omium.org>
Cc: Chris Ball <cjb@...top.org>, Doug Anderson <dianders@...omium.org>,
Will Newton <will.newton@...il.com>,
Seungwon Jeon <tgih.jun@...sung.com>,
Bing Zhao <bzhao@...vell.com>,
Jaehoon Chung <jh80.chung@...sung.com>,
Ashok Nagarajan <asnagarajan@...omium.org>,
Olof Johansson <olof@...om.net>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] mmc: dw_mmc: rewrite CLKDIV computation
Sorry - please ignore the previous version. Did not include a
copyright (implied to be mine...but it's not) nor license.
Same thing but with proper attribution.
cheers,
grant
On Tue, Mar 26, 2013 at 3:53 PM, Grant Grundler <grundler@...omium.org> wrote:
> I've attached the test program I wrote to compare the different
> flavors of CLKDIV computation: old (3.4 kernel), current upstream, and
> my rewrite.
>
> thanks
> grant
>
> On Tue, Mar 26, 2013 at 3:50 PM, Grant Grundler <grundler@...omium.org> wrote:
>> Last year Seungwon Jeon (Samsung) fixed a bug in CLKDIV computation.
>> But when debugging a related issue (http://crbug.com/221828) I found
>> the code unreadable. This rewrite simplifies the computation and
>> explains each step.
>>
>> Signed-off-by: Grant Grundler <grundler@...omium.org>
>> ---
>> Tested on Samsung Series 3 Chromebook (exynos 5250 chipset) using
>> ChromeOS 3.4 kernel (not 3.9-rc3 which this patch is based against).
>>
>> I've written a test program to confirm this patch generates the
>> same correct values and will share that separately.
>>
>> drivers/mmc/host/dw_mmc.c | 22 +++++++++++++++-------
>> 1 file changed, 15 insertions(+), 7 deletions(-)
>>
>>
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 9834221..6fdf55b 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -631,14 +631,22 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
>>
>> if (slot->clock != host->current_speed || force_clkinit) {
>> div = host->bus_hz / slot->clock;
>> - if (host->bus_hz % slot->clock && host->bus_hz > slot->clock)
>> - /*
>> - * move the + 1 after the divide to prevent
>> - * over-clocking the card.
>> + if (host->bus_hz > slot->clock) {
>> + /* don't overclock due to integer math losses */
>> + if ((div * slot->clock) < host->bus_hz)
>> + div++;
>> +
>> + /* don't overclock due to resolution of HW */
>> + if (div & 1)
>> + div++;
>> +
>> + /* See 6.2.3 CLKDIV in "Mobile Storage Host Databook"
>> + * Look for dwc_mobile_storage_db.pdf from Synopsys.
>> + * CLKDIV value 0 means divisor 1, val 1 -> 2, ...
>> */
>> - div += 1;
>> -
>> - div = (host->bus_hz != slot->clock) ? DIV_ROUND_UP(div, 2) : 0;
>> + div /= 2;
>> + } else
>> + div = 0; /* use bus_hz */
>>
>> dev_info(&slot->mmc->class_dev,
>> "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ"
>> --
>> 1.8.1.3
>>
View attachment "test_dw_mmc.c" of type "text/x-csrc" (3725 bytes)
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