linux-kernel - Re: [RFC PATCH 0/5] Add support for S3 non-stop TSC support.

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Message-ID: <20130401203136.GA2543@amd.pavel.ucw.cz>
Date:	Mon, 1 Apr 2013 22:31:36 +0200
From:	Pavel Machek <pavel@....cz>
To:	John Stultz <john.stultz@...aro.org>
Cc:	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	Feng Tang <feng.tang@...el.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...e.hu>,
	"H. Peter Anvin" <hpa@...ux.intel.com>, x86@...nel.org,
	Len Brown <lenb@...nel.org>, linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH 0/5] Add support for S3 non-stop TSC support.

Hi!

> >>>On some new Intel Atom processors (Penwell and Cloverview), there is
> >>>a feature that the TSC won't stop S3, say the TSC value won't be
> >>>reset to 0 after resume. This feature makes TSC a more reliable
> >>>clocksource and could benefit the timekeeping code during system
> >>>suspend/resume cycles.
> >>>
> >>>The enabling efforts include adding new flags for this feature,
> >>>modifying clocksource.c and timekeeping.c to support and utilizing
> >>>it.
> >>>
> >>>One remaining question is inside the timekeeping_resume(), we don't
> >>>know if it is called by resuming from suspend(s2ram) or from
> >>>hibernate(s2disk), as there is no easy way to check it currently.
> >>>But it doesn't hurt as these Penwell/Cloverview platforms only have
> >>>S3 state, and no S4.
> >>>
> >>>Please help to review them, thanks!
> >>The patches look reasonable to me.
> >Not sure... what are advantages? TSC is high resolution, but not
> >exactly precise time source... and this only makes resume more
> >complex.
> Providing sub-second granularity for suspend time measurement is a
> pretty compelling use, which greatly reduces time error across
> suspend/resume.

Certainly for short sleeps. Is TSC actually precise enough to keep
precise time for hours? I thought TSC sucked at precision.

> I agree that the code logic is more complex, but the TSC path should
> be a good bit faster then hitting the CMOS.

You are right here.

> There is the open concern that given their history, x86 designers
> will find yet another way to break the TSC in some future chip and
> we'll end up with non-stop TSCs that run at different frequencies in
> suspend or some other such nonsense. But we'll just have to detect
> that and disable functionality where appropriate, much as we do with
> the TSC now.

Ok.
									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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