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Date:	Thu, 4 Apr 2013 14:22:39 +0200
From:	Alexander Graf <agraf@...e.de>
To:	Gleb Natapov <gleb@...hat.com>
Cc:	"Michael S. Tsirkin" <mst@...hat.com>,
	Marcelo Tosatti <mtosatti@...hat.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
	Xiao Guangrong <xiaoguangrong@...ux.vnet.ibm.com>,
	Takuya Yoshikawa <yoshikawa_takuya_b1@....ntt.co.jp>,
	Alex Williamson <alex.williamson@...hat.com>,
	Will Deacon <will.deacon@....com>,
	Christoffer Dall <c.dall@...tualopensystems.com>,
	Sasha Levin <sasha.levin@...cle.com>,
	Andrew Morton <akpm@...ux-foundation.org>, kvm@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	virtualization@...ts.linux-foundation.org
Subject: Re: [PATCH RFC] kvm: add PV MMIO EVENTFD


On 04.04.2013, at 14:19, Gleb Natapov wrote:

> On Thu, Apr 04, 2013 at 02:09:53PM +0200, Alexander Graf wrote:
>> 
>> On 04.04.2013, at 13:04, Michael S. Tsirkin wrote:
>> 
>>> On Thu, Apr 04, 2013 at 01:57:34PM +0200, Alexander Graf wrote:
>>>> 
>>>> On 04.04.2013, at 12:50, Michael S. Tsirkin wrote:
>>>> 
>>>>> With KVM, MMIO is much slower than PIO, due to the need to
>>>>> do page walk and emulation. But with EPT, it does not have to be: we
>>>>> know the address from the VMCS so if the address is unique, we can look
>>>>> up the eventfd directly, bypassing emulation.
>>>>> 
>>>>> Add an interface for userspace to specify this per-address, we can
>>>>> use this e.g. for virtio.
>>>>> 
>>>>> The implementation adds a separate bus internally. This serves two
>>>>> purposes:
>>>>> - minimize overhead for old userspace that does not use PV MMIO
>>>>> - minimize disruption in other code (since we don't know the length,
>>>>> devices on the MMIO bus only get a valid address in write, this
>>>>> way we don't need to touch all devices to teach them handle
>>>>> an dinvalid length)
>>>>> 
>>>>> At the moment, this optimization is only supported for EPT on x86 and
>>>>> silently ignored for NPT and MMU, so everything works correctly but
>>>>> slowly.
>>>>> 
>>>>> TODO: NPT, MMU and non x86 architectures.
>>>>> 
>>>>> The idea was suggested by Peter Anvin.  Lots of thanks to Gleb for
>>>>> pre-review and suggestions.
>>>>> 
>>>>> Signed-off-by: Michael S. Tsirkin <mst@...hat.com>
>>>> 
>>>> This still uses page fault intercepts which are orders of magnitudes
>>>> slower than hypercalls.
>>> 
>>> Not really. Here's a test:
>>> compare vmcall to portio:
>>> 
>>> vmcall 1519
>>> ...
>>> outl_to_kernel 1745
>>> 
>>> compare portio to mmio:
>>> 
>>> mmio-wildcard-eventfd:pci-mem 3529
>>> mmio-pv-eventfd:pci-mem 1878
>>> portio-wildcard-eventfd:pci-io 1846
>>> 
>>> So not orders of magnitude.
>> 
>> https://dl.dropbox.com/u/8976842/KVM%20Forum%202012/MMIO%20Tuning.pdf
>> 
>> Check out page 41. Higher is better (number is number of loop cycles in a second). My test system was an AMD Istanbul based box.
>> 
> Have you bypassed instruction emulation in your testing?

PIO doesn't do instruction emulation.


Alex

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