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Message-Id: <1365461538-30702-2-git-send-email-gregory.clement@free-electrons.com>
Date: Tue, 9 Apr 2013 00:52:09 +0200
From: Gregory CLEMENT <gregory.clement@...e-electrons.com>
To: Jason Cooper <jason@...edaemon.net>, Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...e-electrons.com>
Cc: Grant Likely <grant.likely@...retlab.ca>,
Rob Herring <rob.herring@...xeda.com>,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
linux-arm-kernel@...ts.infradead.org,
devicetree-discuss@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
Nicolas Pitre <nico@...xnic.net>,
Lior Amsalem <alior@...vell.com>,
Maen Suleiman <maen@...vell.com>,
Tawfik Bayouk <tawfik@...vell.com>,
Shadi Ammouri <shadi@...vell.com>,
Eran Ben-Avi <benavi@...vell.com>,
Yehuda Yitschak <yehuday@...vell.com>,
Nadav Haklai <nadavh@...vell.com>,
Ike Pan <ike.pan@...onical.com>,
Chris Van Hoof <vanhoof@...onical.com>,
Dan Frazier <dann.frazier@...onical.com>,
Leif Lindholm <leif.lindholm@....com>,
Jon Masters <jcm@...hat.com>,
David Marlin <dmarlin@...hat.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Subject: [PATCH v3 1/9] ARM: dts: mvebu: fix cpus section indentation
From: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Align the cpu node indentation with the rest of the file
[gc]: added a commit description
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
---
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 28 ++++++++--------
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 28 ++++++++--------
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 54 +++++++++++++++---------------
3 files changed, 55 insertions(+), 55 deletions(-)
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index f56c405..50180eb 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -25,22 +25,22 @@
};
cpus {
- #address-cells = <1>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- cpu@0 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <0>;
- clocks = <&cpuclk 0>;
- };
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <0>;
+ clocks = <&cpuclk 0>;
+ };
- cpu@1 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <1>;
- clocks = <&cpuclk 1>;
- };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <1>;
+ clocks = <&cpuclk 1>;
+ };
};
soc {
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index f8f2b78..3c433d5 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -26,22 +26,22 @@
};
cpus {
- #address-cells = <1>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- cpu@0 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <0>;
- clocks = <&cpuclk 0>;
- };
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <0>;
+ clocks = <&cpuclk 0>;
+ };
- cpu@1 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <1>;
- clocks = <&cpuclk 1>;
- };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <1>;
+ clocks = <&cpuclk 1>;
+ };
};
soc {
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index 936c25d..4c38e942 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -27,36 +27,36 @@
cpus {
- #address-cells = <1>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- cpu@0 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <0>;
- clocks = <&cpuclk 0>;
- };
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <0>;
+ clocks = <&cpuclk 0>;
+ };
- cpu@1 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <1>;
- clocks = <&cpuclk 1>;
- };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <1>;
+ clocks = <&cpuclk 1>;
+ };
- cpu@2 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <2>;
- clocks = <&cpuclk 2>;
- };
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <2>;
+ clocks = <&cpuclk 2>;
+ };
- cpu@3 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <3>;
- clocks = <&cpuclk 3>;
- };
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <3>;
+ clocks = <&cpuclk 3>;
+ };
};
soc {
@@ -112,4 +112,4 @@
status = "disabled";
};
};
- };
+};
--
1.7.9.5
--
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