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Message-ID: <51672F93.7080109@codeaurora.org>
Date: Thu, 11 Apr 2013 14:48:03 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Mark Rutland <mark.rutland@....com>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
"devicetree-discuss@...ts.ozlabs.org"
<devicetree-discuss@...ts.ozlabs.org>,
Marc Zyngier <Marc.Zyngier@....com>
Subject: Re: [PATCH 1/4] Documentation: Add memory mapped ARM architected
timer binding
On 04/11/13 04:24, Mark Rutland wrote:
> Could we say the reg for the second view is optional?
>
Yes, that's already covered in the binding.
> Might we have a hardware / firmware configuration where the kernel can only access
> the secondary view?
>
I don't see how this is possible. The CNTACRn register controls secure
vs. non-secure access for particular registers in a frame regardless of
which view is used. The CNTPL0ACRn is not a security restricted register
and it can only restrict access to certain registers in the second view.
No combination of settings in these registers can restrict access to
only the second view in a frame with two views.
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