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Message-ID: <C79B248886DD134989C8FF6B096A91AB91B36FB2FE@BGMAIL01.nvidia.com>
Date: Fri, 12 Apr 2013 20:33:20 +0530
From: Jay Agarwal <jagarwal@...dia.com>
To: Peter De Schrijver <pdeschrijver@...dia.com>,
Stephen Warren <swarren@...dotorg.org>
CC: "linux@....linux.org.uk" <linux@....linux.org.uk>,
"thierry.reding@...onic-design.de" <thierry.reding@...onic-design.de>,
Laxman Dewangan <ldewangan@...dia.com>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"olof@...om.net" <olof@...om.net>, Hiroshi Doyu <hdoyu@...dia.com>,
Prashant Gaikwad <pgaikwad@...dia.com>,
"mturquette@...aro.org" <mturquette@...aro.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
Juha Tukkinen <jtukkinen@...dia.com>,
Krishna Thota <kthota@...dia.com>
Subject: RE: [PATCH 2/3] ARM: dts: tegra: Correct PCIe entry
> On Mon, Apr 08, 2013 at 08:27:00PM +0200, Stephen Warren wrote:
> > On 04/08/2013 09:41 AM, Jay Agarwal wrote:
> > > Signed-off-by: Jay Agarwal <jagarwal@...dia.com>
> >
> > Your s-o-b line should be below the patch description, not above it.
> > Please see Documentation/SubmittingPatches.
> >
> > I also don't see a --- line between the patch description and diffstat.
> > How are you generating these patch emails? Please see our internal
> > wiki, or other git documentation.
> >
> > > diff --git a/arch/arm/boot/dts/tegra30.dtsi
> > > b/arch/arm/boot/dts/tegra30.dtsi
> >
> > > - clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml";
> > > + clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml0";
> >
> > Can you please explain more about this change?
> >
> > I see the Tegra clock driver provides both a "cml0" and a "cml1" clock.
> > Are both of those used for PCIe?
> >
>
> cml0 is used for pcie and cml1 is used for sata.
>
[>] Yes correct.
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