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Message-ID: <516B9714.80007@sr71.net>
Date: Sun, 14 Apr 2013 22:58:44 -0700
From: Dave Hansen <dave@...1.net>
To: HATAYAMA Daisuke <d.hatayama@...fujitsu.com>
CC: "H. Peter Anvin" <hpa@...or.com>,
"kexec@...ts.infradead.org" <kexec@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Cliff Wickman <cpw@....com>, Simon Horman <horms@...ge.net.au>,
"Eric W. Biederman" <ebiederm@...ssion.com>,
Yinghai Lu <yinghai@...nel.org>,
Thomas Renninger <trenn@...e.de>,
Vivek Goyal <vgoyal@...hat.com>
Subject: Re: [PATCH 5/5] kexec: X86: Pass memory ranges via e820 table instead
of memmap= boot parameter
On 04/14/2013 09:52 PM, HATAYAMA Daisuke wrote:
> This sounds like there's no such issue on x86 cache mechanism. Is it
> correct? If so, what is the difference between ia64 and x86 cache
> mechanisms?
I'm just going by the code comments:
drivers/char/mem.c
> /*
> * On ia64 if a page has been mapped somewhere as uncached, then
> * it must also be accessed uncached by the kernel or data
> * corruption may occur.
> */
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