linux-kernel - Re: [PATCH 5/5] kexec: X86: Pass memory ranges via e820 table instead of memmap= boot parameter

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Message-ID: <0ad804f8-7ed2-4952-bd96-b169beece359@email.android.com>
Date:	Mon, 15 Apr 2013 07:49:13 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Dave Hansen <dave@...1.net>,
	HATAYAMA Daisuke <d.hatayama@...fujitsu.com>
CC:	"kexec@...ts.infradead.org" <kexec@...ts.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Cliff Wickman <cpw@....com>, Simon Horman <horms@...ge.net.au>,
	"Eric W. Biederman" <ebiederm@...ssion.com>,
	Yinghai Lu <yinghai@...nel.org>,
	Thomas Renninger <trenn@...e.de>,
	Vivek Goyal <vgoyal@...hat.com>
Subject: Re: [PATCH 5/5] kexec: X86: Pass memory ranges via e820 table instead of memmap= boot parameter

This is also true on some x86 systems.

Dave Hansen <dave@...1.net> wrote:

>On 04/14/2013 09:52 PM, HATAYAMA Daisuke wrote:
>> This sounds like there's no such issue on x86 cache mechanism. Is it
>> correct? If so, what is the difference between ia64 and x86 cache
>> mechanisms?
>
>I'm just going by the code comments:
>
>drivers/char/mem.c
>>                 /*
>>                  * On ia64 if a page has been mapped somewhere as
>uncached, then
>>                  * it must also be accessed uncached by the kernel or
>data
>>                  * corruption may occur.
>>                  */

-- 
Sent from my mobile phone. Please excuse brevity and lack of formatting.
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