linux-kernel - perf: forcing instructions event to run on Fixed Counter 0

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Date:	Mon, 15 Apr 2013 12:13:19 -0400 (EDT)
From:	Vince Weaver <vincent.weaver@...ne.edu>
To:	linux-kernel@...r.kernel.org
cc:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	Stephane Eranian <eranian@...il.com>
Subject: perf: forcing instructions event to run on Fixed Counter 0

It turns out that perf_event for intel seems to use the INST_RETIRED.ALL
event interchangably with the "Fixed Counter 0" event.

It turns out they are not equivelent.  The Fixed Counter 0 event turns out 
to be deterministic, while INST_RETIRED.ALL has a bug where it counts 
extra events due to hardware interrupts.

Having a user-accessible deterministic instructions event would be really 
useful.  So is there a way we can specify we want an event to run on Fixed 
Counter 0?  I think there is code already that does this for Fixed Counter 
2 for similar reasons.

For an example of this happening in real life, take the 
./retired_instr.all.x86_64 from my deterministic benchmark that
I'll be presenting at the ISPASS conference next week.  
  (can be found here git://github.com/deater/deterministic.git )

If you run this benchmark with the same event listed 5 times on an Ivy
Bridge machine you get these results, notice the last one is the "proper"
deterministic result and thus the one that ran on Fixed Counter 0.

$ perf stat -e instructions:u,instructions:u,instructions:u,instructions:u,instructions:u ./retired_instr.all.x86_64
...
 Performance counter stats for './retired_instr.all.x86_64':

       227,010,687 instructions:u            #    0.00  insns per cycle        
       227,010,687 instructions:u            #    0.00  insns per cycle        
       227,010,687 instructions:u            #    0.00  insns per cycle        
       227,010,687 instructions:u            #    0.00  insns per cycle        
       227,000,723 instructions:u            #    0.00  insns per cycle        

       1.902648316 seconds time elapsed

Thanks,

Vince Weaver
vincent.weaver@...ne.edu
http://www.eece.maine.edu/~vweaver/
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