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Message-ID: <0000013e0e9e0ca6-12c738ba-6939-4b31-8a40-186019c5d16a-000000@email.amazonses.com>
Date: Mon, 15 Apr 2013 16:53:59 +0000
From: Christoph Lameter <cl@...ux.com>
To: Arjan van de Ven <arjan@...ux.intel.com>
cc: paulmck@...ux.vnet.ibm.com, Peter Zijlstra <peterz@...radead.org>,
Borislav Petkov <bp@...en8.de>, linux-kernel@...r.kernel.org,
mingo@...e.hu, laijs@...fujitsu.com, dipankar@...ibm.com,
akpm@...ux-foundation.org, mathieu.desnoyers@...ymtl.ca,
josh@...htriplett.org, niv@...ibm.com, tglx@...utronix.de,
rostedt@...dmis.org, Valdis.Kletnieks@...edu, dhowells@...hat.com,
edumazet@...gle.com, darren@...art.com, fweisbec@...il.com,
sbw@....edu, Kevin Hilman <khilman@...aro.org>
Subject: Re: [PATCH documentation 1/2] nohz1: Add documentation.
On Mon, 15 Apr 2013, Arjan van de Ven wrote:
> to put the "cost" into perspective; programming a timer in one-shot mode
> is some math on the cpu (to go from kernel time to hardware time),
> which is a multiply and a shift (or a divide), and then actually
> programming the hardware, which is at the cost of (approximately) a cachemiss
> or two
> (so give or take in the "hundreds" of cycles)
> at least on moderately modern hardware (e.g. last few years)
Well these are PCI transactions which are bound to be high latency
reaching may be more than microscond in total. A timer interrupt may last
2-4 microsecond at best without PCI transactions.
> not cheap. But also not INSANE expensive... and it breaks-even already if you
> only
> save one or two cache misses elsewhere.
Ok then maybe go dynticks if we can save at least one timer tick?
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